Searched refs:soc_con11 (Results 1 – 9 of 9) sorted by relevance
24 uint32_t soc_con11; /* address offset: 0x002c */ member142 uint32_t soc_con11; /* address offset: 0x002c */ member
72 u32 soc_con11; member
78 u32 soc_con11; member
61 uint32_t soc_con11; /* Address Offset: 0x032C */ member
70 u32 soc_con11; member117 u32 soc_con11; member
258 u32 soc_con11; member279 u32 soc_con11; member
83 uint32_t soc_con11; /* address offset: 0x002c */ member
100 rk_clrsetreg(&grf->soc_con11, MCU_SRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
564 rk_clrsetreg(&grf->soc_con11, RK3506_GMAC_CLK_RMII_DIV_MASK, div); in rk3506_set_rmii_speed()1378 rk_clrsetreg(&grf->soc_con11, RK3506_GMAC_CLK_RMII_MODE_MASK, clk_mode); in rk3506_set_to_rmii()2249 rk_clrsetreg(&grf->soc_con11, RK3506_GMAC_CLK_SELET_MASK, val); in rk3506_set_clock_selection()