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/rk3399_rockchip-uboot/arch/arm/cpu/armv7m/
H A Dcache.c61 u32 sets; member
69 cache->sets = (cache_size_id & MASK_NUM_SETS) >> NUM_SETS_SHIFT; in get_cache_ways_sets()
186 debug("cache: ways= %d, sets= %d\n", cache.ways + 1, cache.sets + 1); in action_dcache_all()
187 for (i = cache.sets; i >= 0; i--) { in action_dcache_all()
/rk3399_rockchip-uboot/doc/device-tree-bindings/gpio/
H A Dintel,x86-broadwell-pinctrl.txt14 - output-value - sets the default output value of the GPIO, 0 (low, default)
16 - direction - sets the direction of the gpio, either PIN_INPUT (default)
19 - trigger - sets the trigger type, either TRIGGER_EDGE (default) or
22 - owner 0 sets the owner of the pin, either OWNER_ACPI (default) or
24 - route - sets whether the pin is routed, either PIRQ_APIC_MASK or
H A Dnvidia,tegra186-gpio.txt12 major sets of registers exist:
52 both the overall controller HW module and the sets-of-ports as "controllers".
/rk3399_rockchip-uboot/board/advantech/dms-ba16/
H A Dclocks.cfg23 * This sets CKO1 at ahb_clk_root/8 132/8 16.5 MHz
/rk3399_rockchip-uboot/board/toradex/apalis_imx6/
H A Dclocks.cfg40 * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
/rk3399_rockchip-uboot/board/toradex/colibri_imx6/
H A Dclocks.cfg40 * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
/rk3399_rockchip-uboot/board/boundary/nitrogen6x/
H A Dclocks.cfg39 * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
/rk3399_rockchip-uboot/doc/
H A DREADME.mpc74xx12 sets up the L2 cache, so it's not enabled. (IMHO, it shouldn't be
H A DREADME.NDS3211 - Intermixable 32-bit and 16-bit instruction sets without the need for
H A DREADME.mpc85xx-spin-table9 Core 0 sets up the reset page on the top 4K of memory (or 4GB if total memory
H A DREADME.nand-boot-ppc44021 has to fit into 4kByte. It sets up the CPU and configures the SDRAM
H A DREADME.mpc85xx11 To maximize the time during which this requirement is met, U-Boot sets MSR[DE]
/rk3399_rockchip-uboot/tools/binman/
H A DREADME250 This sets the position of an entry within the image. The first byte
252 binman sets it to the end of the previous region, or the start of
256 This sets the alignment of the entry. The entry position is adjusted
263 This sets the size of the entry. The contents will be padded out to
279 This sets the alignment of the entry size. For example, to ensure
284 This sets the alignment of the end of an entry. Some entries require
309 This sets the alignment of the image size. For example, to ensure
314 This sets the padding before the image entries. The first entry will
318 This sets the padding after the image entries. The padding will be
479 when Entry_blob loads a file, it sets content_size to the size of the file.
/rk3399_rockchip-uboot/doc/device-tree-bindings/exynos/
H A Dtmu.txt23 - It sets the gain of amplifier to the positive-tc generator block.
/rk3399_rockchip-uboot/drivers/core/
H A DKconfig98 Hardware peripherals tend to have one or more sets of registers
108 Hardware peripherals tend to have one or more sets of registers
118 Hardware peripherals tend to have one or more sets of registers
/rk3399_rockchip-uboot/board/bachmann/ot1200/
H A Dmx6q_4x_mt41j128.cfg153 * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
/rk3399_rockchip-uboot/board/ge/bx50v3/
H A Dbx50v3.cfg149 * This sets CKO1 at ahb_clk_root/8 132/8 16.5 MHz
/rk3399_rockchip-uboot/arch/nds32/cpu/n1213/
H A Dstart.S24 #define ICAC_MEM_KBF_ISET (0x07) ! I Cache sets per way
27 #define DCAC_MEM_KBF_DSET (0x07) ! D Cache sets per way
/rk3399_rockchip-uboot/arch/arm/dts/
H A Duniphier-pro5.dtsi144 cache-sets = <512>;
157 cache-sets = <512>;
H A Dsun9i-a80-cubieboard4.dts202 * Allwinner SDK always sets it to 3.3V.
/rk3399_rockchip-uboot/arch/x86/dts/
H A Dbayleybay.dts77 * Detect signal. The default PAD value for the CD pin sets
/rk3399_rockchip-uboot/doc/SPL/
H A DREADME.am335x-network49 Identifier (VCI) set by BOOTP client (RBL sets VCI to "DM814x ROM v1.0"
/rk3399_rockchip-uboot/test/py/
H A DREADME.md130 - `--build-dir` sets the directory containing the compiled U-Boot binaries.
132 - `--result-dir` sets the directory to write results, such as log files,
134 - `--persistent-data-dir` sets the directory used to store persistent test
/rk3399_rockchip-uboot/doc/driver-model/
H A Dspi-howto.txt395 It sets up the speed, mode, pinmux, feedback delay and clears the FIFOs.
622 This sets up the mode and speed in struct spi_slave by
624 It also sets the 'dev' pointer, needed to permit passing
H A Dspi-howto.rst430 It sets up the speed, mode, pinmux, feedback delay and clears the FIFOs.
686 This sets up the mode and speed in struct spi_slave by
688 It also sets the 'dev' pointer, needed to permit passing

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