| /rk3399_rockchip-uboot/scripts/ |
| H A D | repack-bootimg | 8 usage: $0 [-h] [-z] --boot_img BOOT_IMG [--out OUT] [--kernel KERNEL] [--ramdisk RAMDISK] [--second… 17 --second SECOND path to the new 2nd bootloader (default: resource.img) 45 --second) 46 second=$2 103 if [ "$second" == "" ]; then 104 second=${second-$out/second} 140 SECOND="--second $second"
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| H A D | android2fit.sh | 59 ./scripts/unpack_resource.sh ${OUT}/second ${OUT}/ 60 mv ${OUT}/second ${OUT}/resource 64 cp ${OUT}/resource images/second
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| H A D | mkbootimg | 58 num_second_pages = get_number_of_pages(filesize(args.second), args.pagesize) 74 final_second_offset = (args.base + args.second_offset) if filesize(args.second) > 0 else 0 80 filesize(args.second), # size in bytes 92 update_sha(sha, args.second) 216 write_padded_file(args.output, args.second, args.pagesize)
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| H A D | android2distro.sh | 54 ./scripts/unpack_resource.sh distro/second distro/
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| H A D | pack_resource.sh | 76 ./scripts/repack-bootimg --boot_img ${BOOT_OLD} --second ${RSCE_NEW} -o ${BOOT_NEW}
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| /rk3399_rockchip-uboot/arch/arm/include/asm/ |
| H A D | opcodes.h | 147 #define __opcode_thumb32_compose(first, second) ( \ argument 149 | ___opcode_identity32(___opcode_identity16(second)) \ 153 #define ___asm_opcode_thumb32_compose(first, second) ( \ argument 155 | ___asm_opcode_identity32(___asm_opcode_identity16(second)) \ 221 #define ___inst_thumb32(first, second) .short first, second 225 #define ___inst_thumb32(first, second) \ argument 226 ".short " __stringify(first) ", " __stringify(second) "\n\t"
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| H A D | davinci_rtc.h | 18 unsigned int second; member
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| /rk3399_rockchip-uboot/drivers/rtc/ |
| H A D | ftrtc010.c | 58 unsigned long second; in ftrtc010_time() local 62 second = readl(&rtc->sec); in ftrtc010_time() 67 } while (second != second2); in ftrtc010_time() 69 return day * 24 * 60 * 60 + hour * 60 * 60 + minute * 60 + second; in ftrtc010_time()
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| H A D | davinci.c | 28 sec = readl(&rtc->second); in rtc_get() 72 writel(bin2bcd(tmp->tm_sec), &rtc->second); in rtc_set()
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| /rk3399_rockchip-uboot/tools/binman/ |
| H A D | func_test.py | 657 second = data[len(U_BOOT_NODTB_DATA):] 660 fd.write(second) 667 fdt_len = self.GetFdtLen(second) 668 third = second[fdt_len:] 700 second = data[len(U_BOOT_NODTB_DATA):] 702 fdt_len = self.GetFdtLen(second) 703 third = second[fdt_len:] 704 second = second[:fdt_len] 707 self.assertIn(ucode_data, second) 708 ucode_pos = second.find(ucode_data) + len(U_BOOT_NODTB_DATA) [all …]
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| /rk3399_rockchip-uboot/board/toradex/common/ |
| H A D | Kconfig | 55 int "Toradex config block offset, second instance" 63 bool "Set the second Ethernet address" 67 second Ethernet address as environment variable (eth1addr).
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/gpio/ |
| H A D | nvidia,tegra20-gpio.txt | 10 second cell is used to specify optional parameters: 15 The second cell is used to specify flags:
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| /rk3399_rockchip-uboot/board/freescale/mpc8536ds/ |
| H A D | README | 12 call 4K NAND loader and a second stage image. The former is appended to 16 configure the L2SRAM, then copy the second stage image to L2SRAM and jump 17 to it. The second stage image is to configure all the hardware and boot up 25 second stage image. It's set in the board config file when boot from NAND
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| /rk3399_rockchip-uboot/drivers/clk/at91/ |
| H A D | Kconfig | 41 driver. Some peripherals may need a second clock source 42 that may be different from the system clock. This second
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/pwm/ |
| H A D | tegra20-pwm.txt | 9 first cell specifies the per-chip index of the PWM to use and the second
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| /rk3399_rockchip-uboot/arch/xtensa/dts/ |
| H A D | xtfpga.dtsi | 31 * two cells: second cell == 0: internal irq number 32 * second cell == 1: external irq number
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| /rk3399_rockchip-uboot/arch/x86/lib/ |
| H A D | crt0_ia32_efi.S | 29 pushl %ebx # pass _DYNAMIC as second argument
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| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xx/ |
| H A D | immap.c | 96 int i, second = (counter++ % 2); in binary() local 98 if (second) in binary() 112 if (second) in binary()
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/misc/ |
| H A D | intel,irq-router.txt | 24 The second cell is the total number of PIRQ links the router supports. 30 The second cell is the PCI interrupt pin used by this device. The last cell
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| /rk3399_rockchip-uboot/doc/uImage.FIT/ |
| H A D | verified-boot.txt | 74 It is also possible to extend this scheme to a second level, like this: 78 2. Secondary private key is created and used to sign second-stage images. 81 use the secondary public key in the first-stage image to verify the second-
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| /rk3399_rockchip-uboot/board/phytec/pfla02/ |
| H A D | README | 20 as second option.
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| /rk3399_rockchip-uboot/arch/arm/mach-bcmstb/ |
| H A D | Kconfig | 8 is acting as the second stage bootloader, and U-Boot is
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/ata/ |
| H A D | intel-sata.txt | 14 bit 1=enable second port, etc.
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.SNTP | 8 set local time to RTC, set the offset in second from UTC to the
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/spi/ |
| H A D | soft-spi.txt | 17 The first cell holds the phandle of the controller and the second cell
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