1c2da86f3SMasahiro Yamada /* 2c2da86f3SMasahiro Yamada * arch/arm/include/asm/opcodes.h 3c2da86f3SMasahiro Yamada * 4*c54bcf68SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0 5c2da86f3SMasahiro Yamada */ 6c2da86f3SMasahiro Yamada 7c2da86f3SMasahiro Yamada #ifndef __ASM_ARM_OPCODES_H 8c2da86f3SMasahiro Yamada #define __ASM_ARM_OPCODES_H 9c2da86f3SMasahiro Yamada 10c2da86f3SMasahiro Yamada #ifndef __ASSEMBLY__ 11c2da86f3SMasahiro Yamada #include <linux/linkage.h> 12c2da86f3SMasahiro Yamada extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); 13c2da86f3SMasahiro Yamada #endif 14c2da86f3SMasahiro Yamada 15c2da86f3SMasahiro Yamada #define ARM_OPCODE_CONDTEST_FAIL 0 16c2da86f3SMasahiro Yamada #define ARM_OPCODE_CONDTEST_PASS 1 17c2da86f3SMasahiro Yamada #define ARM_OPCODE_CONDTEST_UNCOND 2 18c2da86f3SMasahiro Yamada 19c2da86f3SMasahiro Yamada 20c2da86f3SMasahiro Yamada /* 21c2da86f3SMasahiro Yamada * Assembler opcode byteswap helpers. 22c2da86f3SMasahiro Yamada * These are only intended for use by this header: don't use them directly, 23c2da86f3SMasahiro Yamada * because they will be suboptimal in most cases. 24c2da86f3SMasahiro Yamada */ 25c2da86f3SMasahiro Yamada #define ___asm_opcode_swab32(x) ( \ 26c2da86f3SMasahiro Yamada (((x) << 24) & 0xFF000000) \ 27c2da86f3SMasahiro Yamada | (((x) << 8) & 0x00FF0000) \ 28c2da86f3SMasahiro Yamada | (((x) >> 8) & 0x0000FF00) \ 29c2da86f3SMasahiro Yamada | (((x) >> 24) & 0x000000FF) \ 30c2da86f3SMasahiro Yamada ) 31c2da86f3SMasahiro Yamada #define ___asm_opcode_swab16(x) ( \ 32c2da86f3SMasahiro Yamada (((x) << 8) & 0xFF00) \ 33c2da86f3SMasahiro Yamada | (((x) >> 8) & 0x00FF) \ 34c2da86f3SMasahiro Yamada ) 35c2da86f3SMasahiro Yamada #define ___asm_opcode_swahb32(x) ( \ 36c2da86f3SMasahiro Yamada (((x) << 8) & 0xFF00FF00) \ 37c2da86f3SMasahiro Yamada | (((x) >> 8) & 0x00FF00FF) \ 38c2da86f3SMasahiro Yamada ) 39c2da86f3SMasahiro Yamada #define ___asm_opcode_swahw32(x) ( \ 40c2da86f3SMasahiro Yamada (((x) << 16) & 0xFFFF0000) \ 41c2da86f3SMasahiro Yamada | (((x) >> 16) & 0x0000FFFF) \ 42c2da86f3SMasahiro Yamada ) 43c2da86f3SMasahiro Yamada #define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF) 44c2da86f3SMasahiro Yamada #define ___asm_opcode_identity16(x) ((x) & 0xFFFF) 45c2da86f3SMasahiro Yamada 46c2da86f3SMasahiro Yamada 47c2da86f3SMasahiro Yamada /* 48c2da86f3SMasahiro Yamada * Opcode byteswap helpers 49c2da86f3SMasahiro Yamada * 50c2da86f3SMasahiro Yamada * These macros help with converting instructions between a canonical integer 51c2da86f3SMasahiro Yamada * format and in-memory representation, in an endianness-agnostic manner. 52c2da86f3SMasahiro Yamada * 53c2da86f3SMasahiro Yamada * __mem_to_opcode_*() convert from in-memory representation to canonical form. 54c2da86f3SMasahiro Yamada * __opcode_to_mem_*() convert from canonical form to in-memory representation. 55c2da86f3SMasahiro Yamada * 56c2da86f3SMasahiro Yamada * 57c2da86f3SMasahiro Yamada * Canonical instruction representation: 58c2da86f3SMasahiro Yamada * 59c2da86f3SMasahiro Yamada * ARM: 0xKKLLMMNN 60c2da86f3SMasahiro Yamada * Thumb 16-bit: 0x0000KKLL, where KK < 0xE8 61c2da86f3SMasahiro Yamada * Thumb 32-bit: 0xKKLLMMNN, where KK >= 0xE8 62c2da86f3SMasahiro Yamada * 63c2da86f3SMasahiro Yamada * There is no way to distinguish an ARM instruction in canonical representation 64c2da86f3SMasahiro Yamada * from a Thumb instruction (just as these cannot be distinguished in memory). 65c2da86f3SMasahiro Yamada * Where this distinction is important, it needs to be tracked separately. 66c2da86f3SMasahiro Yamada * 67c2da86f3SMasahiro Yamada * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not 68c2da86f3SMasahiro Yamada * represent any valid Thumb-2 instruction. For this range, 69c2da86f3SMasahiro Yamada * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false. 70c2da86f3SMasahiro Yamada * 71c2da86f3SMasahiro Yamada * The ___asm variants are intended only for use by this header, in situations 72c2da86f3SMasahiro Yamada * involving inline assembler. For .S files, the normal __opcode_*() macros 73c2da86f3SMasahiro Yamada * should do the right thing. 74c2da86f3SMasahiro Yamada */ 75c2da86f3SMasahiro Yamada #ifdef __ASSEMBLY__ 76c2da86f3SMasahiro Yamada 77c2da86f3SMasahiro Yamada #define ___opcode_swab32(x) ___asm_opcode_swab32(x) 78c2da86f3SMasahiro Yamada #define ___opcode_swab16(x) ___asm_opcode_swab16(x) 79c2da86f3SMasahiro Yamada #define ___opcode_swahb32(x) ___asm_opcode_swahb32(x) 80c2da86f3SMasahiro Yamada #define ___opcode_swahw32(x) ___asm_opcode_swahw32(x) 81c2da86f3SMasahiro Yamada #define ___opcode_identity32(x) ___asm_opcode_identity32(x) 82c2da86f3SMasahiro Yamada #define ___opcode_identity16(x) ___asm_opcode_identity16(x) 83c2da86f3SMasahiro Yamada 84c2da86f3SMasahiro Yamada #else /* ! __ASSEMBLY__ */ 85c2da86f3SMasahiro Yamada 86c2da86f3SMasahiro Yamada #include <linux/types.h> 87c2da86f3SMasahiro Yamada #include <linux/swab.h> 88c2da86f3SMasahiro Yamada 89c2da86f3SMasahiro Yamada #define ___opcode_swab32(x) swab32(x) 90c2da86f3SMasahiro Yamada #define ___opcode_swab16(x) swab16(x) 91c2da86f3SMasahiro Yamada #define ___opcode_swahb32(x) swahb32(x) 92c2da86f3SMasahiro Yamada #define ___opcode_swahw32(x) swahw32(x) 93c2da86f3SMasahiro Yamada #define ___opcode_identity32(x) ((u32)(x)) 94c2da86f3SMasahiro Yamada #define ___opcode_identity16(x) ((u16)(x)) 95c2da86f3SMasahiro Yamada 96c2da86f3SMasahiro Yamada #endif /* ! __ASSEMBLY__ */ 97c2da86f3SMasahiro Yamada 98c2da86f3SMasahiro Yamada 99c2da86f3SMasahiro Yamada #ifdef CONFIG_CPU_ENDIAN_BE8 100c2da86f3SMasahiro Yamada 101c2da86f3SMasahiro Yamada #define __opcode_to_mem_arm(x) ___opcode_swab32(x) 102c2da86f3SMasahiro Yamada #define __opcode_to_mem_thumb16(x) ___opcode_swab16(x) 103c2da86f3SMasahiro Yamada #define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x) 104c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x) 105c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x) 106c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x) 107c2da86f3SMasahiro Yamada 108c2da86f3SMasahiro Yamada #else /* ! CONFIG_CPU_ENDIAN_BE8 */ 109c2da86f3SMasahiro Yamada 110c2da86f3SMasahiro Yamada #define __opcode_to_mem_arm(x) ___opcode_identity32(x) 111c2da86f3SMasahiro Yamada #define __opcode_to_mem_thumb16(x) ___opcode_identity16(x) 112c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x) 113c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x) 114c2da86f3SMasahiro Yamada #ifndef CONFIG_CPU_ENDIAN_BE32 115c2da86f3SMasahiro Yamada /* 116c2da86f3SMasahiro Yamada * On BE32 systems, using 32-bit accesses to store Thumb instructions will not 117c2da86f3SMasahiro Yamada * work in all cases, due to alignment constraints. For now, a correct 118c2da86f3SMasahiro Yamada * version is not provided for BE32. 119c2da86f3SMasahiro Yamada */ 120c2da86f3SMasahiro Yamada #define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x) 121c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x) 122c2da86f3SMasahiro Yamada #endif 123c2da86f3SMasahiro Yamada 124c2da86f3SMasahiro Yamada #endif /* ! CONFIG_CPU_ENDIAN_BE8 */ 125c2da86f3SMasahiro Yamada 126c2da86f3SMasahiro Yamada #define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x) 127c2da86f3SMasahiro Yamada #define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x) 128c2da86f3SMasahiro Yamada #ifndef CONFIG_CPU_ENDIAN_BE32 129c2da86f3SMasahiro Yamada #define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x) 130c2da86f3SMasahiro Yamada #endif 131c2da86f3SMasahiro Yamada 132c2da86f3SMasahiro Yamada /* Operations specific to Thumb opcodes */ 133c2da86f3SMasahiro Yamada 134c2da86f3SMasahiro Yamada /* Instruction size checks: */ 135c2da86f3SMasahiro Yamada #define __opcode_is_thumb32(x) ( \ 136c2da86f3SMasahiro Yamada ((x) & 0xF8000000) == 0xE8000000 \ 137c2da86f3SMasahiro Yamada || ((x) & 0xF0000000) == 0xF0000000 \ 138c2da86f3SMasahiro Yamada ) 139c2da86f3SMasahiro Yamada #define __opcode_is_thumb16(x) ( \ 140c2da86f3SMasahiro Yamada ((x) & 0xFFFF0000) == 0 \ 141c2da86f3SMasahiro Yamada && !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000) \ 142c2da86f3SMasahiro Yamada ) 143c2da86f3SMasahiro Yamada 144c2da86f3SMasahiro Yamada /* Operations to construct or split 32-bit Thumb instructions: */ 145c2da86f3SMasahiro Yamada #define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16)) 146c2da86f3SMasahiro Yamada #define __opcode_thumb32_second(x) (___opcode_identity16(x)) 147c2da86f3SMasahiro Yamada #define __opcode_thumb32_compose(first, second) ( \ 148c2da86f3SMasahiro Yamada (___opcode_identity32(___opcode_identity16(first)) << 16) \ 149c2da86f3SMasahiro Yamada | ___opcode_identity32(___opcode_identity16(second)) \ 150c2da86f3SMasahiro Yamada ) 151c2da86f3SMasahiro Yamada #define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16)) 152c2da86f3SMasahiro Yamada #define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x)) 153c2da86f3SMasahiro Yamada #define ___asm_opcode_thumb32_compose(first, second) ( \ 154c2da86f3SMasahiro Yamada (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \ 155c2da86f3SMasahiro Yamada | ___asm_opcode_identity32(___asm_opcode_identity16(second)) \ 156c2da86f3SMasahiro Yamada ) 157c2da86f3SMasahiro Yamada 158c2da86f3SMasahiro Yamada /* 159c2da86f3SMasahiro Yamada * Opcode injection helpers 160c2da86f3SMasahiro Yamada * 161c2da86f3SMasahiro Yamada * In rare cases it is necessary to assemble an opcode which the 162c2da86f3SMasahiro Yamada * assembler does not support directly, or which would normally be 163c2da86f3SMasahiro Yamada * rejected because of the CFLAGS or AFLAGS used to build the affected 164c2da86f3SMasahiro Yamada * file. 165c2da86f3SMasahiro Yamada * 166c2da86f3SMasahiro Yamada * Before using these macros, consider carefully whether it is feasible 167c2da86f3SMasahiro Yamada * instead to change the build flags for your file, or whether it really 168c2da86f3SMasahiro Yamada * makes sense to support old assembler versions when building that 169c2da86f3SMasahiro Yamada * particular kernel feature. 170c2da86f3SMasahiro Yamada * 171c2da86f3SMasahiro Yamada * The macros defined here should only be used where there is no viable 172c2da86f3SMasahiro Yamada * alternative. 173c2da86f3SMasahiro Yamada * 174c2da86f3SMasahiro Yamada * 175c2da86f3SMasahiro Yamada * __inst_arm(x): emit the specified ARM opcode 176c2da86f3SMasahiro Yamada * __inst_thumb16(x): emit the specified 16-bit Thumb opcode 177c2da86f3SMasahiro Yamada * __inst_thumb32(x): emit the specified 32-bit Thumb opcode 178c2da86f3SMasahiro Yamada * 179c2da86f3SMasahiro Yamada * __inst_arm_thumb16(arm, thumb): emit either the specified arm or 180c2da86f3SMasahiro Yamada * 16-bit Thumb opcode, depending on whether an ARM or Thumb-2 181c2da86f3SMasahiro Yamada * kernel is being built 182c2da86f3SMasahiro Yamada * 183c2da86f3SMasahiro Yamada * __inst_arm_thumb32(arm, thumb): emit either the specified arm or 184c2da86f3SMasahiro Yamada * 32-bit Thumb opcode, depending on whether an ARM or Thumb-2 185c2da86f3SMasahiro Yamada * kernel is being built 186c2da86f3SMasahiro Yamada * 187c2da86f3SMasahiro Yamada * 188c2da86f3SMasahiro Yamada * Note that using these macros directly is poor practice. Instead, you 189c2da86f3SMasahiro Yamada * should use them to define human-readable wrapper macros to encode the 190c2da86f3SMasahiro Yamada * instructions that you care about. In code which might run on ARMv7 or 191c2da86f3SMasahiro Yamada * above, you can usually use the __inst_arm_thumb{16,32} macros to 192c2da86f3SMasahiro Yamada * specify the ARM and Thumb alternatives at the same time. This ensures 193c2da86f3SMasahiro Yamada * that the correct opcode gets emitted depending on the instruction set 194c2da86f3SMasahiro Yamada * used for the kernel build. 195c2da86f3SMasahiro Yamada * 196c2da86f3SMasahiro Yamada * Look at opcodes-virt.h for an example of how to use these macros. 197c2da86f3SMasahiro Yamada */ 198c2da86f3SMasahiro Yamada #include <linux/stringify.h> 199c2da86f3SMasahiro Yamada 200c2da86f3SMasahiro Yamada #define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x)) 201c2da86f3SMasahiro Yamada #define __inst_thumb32(x) ___inst_thumb32( \ 202c2da86f3SMasahiro Yamada ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)), \ 203c2da86f3SMasahiro Yamada ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x)) \ 204c2da86f3SMasahiro Yamada ) 205c2da86f3SMasahiro Yamada #define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x)) 206c2da86f3SMasahiro Yamada 207c2da86f3SMasahiro Yamada #ifdef CONFIG_THUMB2_KERNEL 208c2da86f3SMasahiro Yamada #define __inst_arm_thumb16(arm_opcode, thumb_opcode) \ 209c2da86f3SMasahiro Yamada __inst_thumb16(thumb_opcode) 210c2da86f3SMasahiro Yamada #define __inst_arm_thumb32(arm_opcode, thumb_opcode) \ 211c2da86f3SMasahiro Yamada __inst_thumb32(thumb_opcode) 212c2da86f3SMasahiro Yamada #else 213c2da86f3SMasahiro Yamada #define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode) 214c2da86f3SMasahiro Yamada #define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode) 215c2da86f3SMasahiro Yamada #endif 216c2da86f3SMasahiro Yamada 217c2da86f3SMasahiro Yamada /* Helpers for the helpers. Don't use these directly. */ 218c2da86f3SMasahiro Yamada #ifdef __ASSEMBLY__ 219c2da86f3SMasahiro Yamada #define ___inst_arm(x) .long x 220c2da86f3SMasahiro Yamada #define ___inst_thumb16(x) .short x 221c2da86f3SMasahiro Yamada #define ___inst_thumb32(first, second) .short first, second 222c2da86f3SMasahiro Yamada #else 223c2da86f3SMasahiro Yamada #define ___inst_arm(x) ".long " __stringify(x) "\n\t" 224c2da86f3SMasahiro Yamada #define ___inst_thumb16(x) ".short " __stringify(x) "\n\t" 225c2da86f3SMasahiro Yamada #define ___inst_thumb32(first, second) \ 226c2da86f3SMasahiro Yamada ".short " __stringify(first) ", " __stringify(second) "\n\t" 227c2da86f3SMasahiro Yamada #endif 228c2da86f3SMasahiro Yamada 229c2da86f3SMasahiro Yamada #endif /* __ASM_ARM_OPCODES_H */ 230