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/rk3399_rockchip-uboot/arch/arm/mach-exynos/
H A Dpower.c42 struct exynos5_power *power = in exynos5_set_usbhost_phy_ctrl() local
47 setbits_le32(&power->usbhost_phy_control, in exynos5_set_usbhost_phy_ctrl()
51 clrbits_le32(&power->usbhost_phy_control, in exynos5_set_usbhost_phy_ctrl()
58 struct exynos4412_power *power = in exynos4412_set_usbhost_phy_ctrl() local
63 setbits_le32(&power->usbhost_phy_control, in exynos4412_set_usbhost_phy_ctrl()
65 setbits_le32(&power->hsic1_phy_control, in exynos4412_set_usbhost_phy_ctrl()
67 setbits_le32(&power->hsic2_phy_control, in exynos4412_set_usbhost_phy_ctrl()
71 clrbits_le32(&power->usbhost_phy_control, in exynos4412_set_usbhost_phy_ctrl()
73 clrbits_le32(&power->hsic1_phy_control, in exynos4412_set_usbhost_phy_ctrl()
75 clrbits_le32(&power->hsic2_phy_control, in exynos4412_set_usbhost_phy_ctrl()
[all …]
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dbcm2835-rpi.dtsi1 #include <dt-bindings/power/raspberrypi-power.h>
25 power: power { label
26 compatible = "raspberrypi,bcm2835-power";
28 #power-domain-cells = <1>;
76 power-domains = <&power RPI_POWER_DOMAIN_USB>;
80 power-domains = <&power RPI_POWER_DOMAIN_V3D>;
84 power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
H A Dzynqmp.dtsi72 power-domains {
76 #power-domain-cells = <0x0>;
81 #power-domain-cells = <0x0>;
86 #power-domain-cells = <0x0>;
91 #power-domain-cells = <0x0>;
96 #power-domain-cells = <0x0>;
101 #power-domain-cells = <0x0>;
106 #power-domain-cells = <0x0>;
111 #power-domain-cells = <0x0>;
116 #power-domain-cells = <0x0>;
[all …]
H A Dr8a7795.dtsi13 #include <dt-bindings/power/r8a7795-sysc.h>
44 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
53 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
62 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
71 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
80 power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
89 power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
98 power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
107 power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
114 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
[all …]
H A Dr8a7796.dtsi13 #include <dt-bindings/power/r8a7796-sysc.h>
44 power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
53 power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
62 power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
71 power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
80 power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
89 power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
96 power-domains = <&sysc R8A7796_PD_CA57_SCU>;
103 power-domains = <&sysc R8A7796_PD_CA53_SCU>;
160 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
[all …]
H A Drk3588s.dtsi10 #include <dt-bindings/power/rk3588-power.h>
257 power-domains = <&power RK3588_PD_USB>;
268 snps,dis-del-phy-power-chg-quirk;
282 power-domains = <&power RK3588_PD_USB>;
294 power-domains = <&power RK3588_PD_USB>;
306 power-domains = <&power RK3588_PD_USB>;
318 power-domains = <&power RK3588_PD_USB>;
360 power-domains = <&power RK3588_PD_PHP>;
367 snps,dis-del-phy-power-chg-quirk;
607 pmu: power-management@fd8d8000 {
[all …]
H A Drk3576.dtsi10 #include <dt-bindings/power/rk3576-power.h>
247 #power-domain-cells = <1>;
256 #power-domain-cells = <1>;
265 #power-domain-cells = <1>;
274 #power-domain-cells = <1>;
283 #power-domain-cells = <1>;
292 #power-domain-cells = <1>;
301 #power-domain-cells = <1>;
310 #power-domain-cells = <1>;
319 #power-domain-cells = <1>;
[all …]
H A Drv1126.dtsi7 #include <dt-bindings/power/rv1126-power.h>
342 sustainable-power = <977>; /* milliwatts */
350 sustainable-power = <977>; /* milliwatts */
580 pmu: power-management@ff3e0000 {
584 power: power-controller { label
585 compatible = "rockchip,rv1126-power-controller";
586 #power-domain-cells = <1>;
591 /* These power domains are grouped by VD_NPU */
600 /* These power domains are grouped by VD_VEPU */
610 /* These power domains are grouped by VD_LOGIC */
[all …]
H A Drk3568.dtsi13 #include <dt-bindings/power/rk3568-power.h>
220 power-domains = <&power RK3568_PD_PIPE>;
235 power-domains = <&power RK3568_PD_PIPE>;
250 power-domains = <&power RK3568_PD_PIPE>;
273 power-domains = <&power RK3568_PD_PIPE>;
279 snps,dis-del-phy-power-chg-quirk;
305 power-domains = <&power RK3568_PD_PIPE>;
311 snps,dis-del-phy-power-chg-quirk;
654 pmu: power-management@fdd90000 {
658 power: power-controller { label
[all …]
H A Dr8a7796-salvator-x.dts139 power-source = <3300>;
145 power-source = <1800>;
151 power-source = <3300>;
157 power-source = <1800>;
163 power-source = <3300>;
169 power-source = <1800>;
/rk3399_rockchip-uboot/drivers/power/domain/
H A DKconfig4 bool "Enable power domain support using Driver Model"
7 Enable support for the power domain driver class. Many SoCs allow
8 power to be applied to or removed from portions of the SoC (power
9 domains). This may be used to save power. This API provides the
10 means to control such power management hardware.
13 bool "Enable the BCM6328 power domain driver"
16 Enable support for manipulating BCM6345 power domains via MMIO
20 bool "Enable the sandbox power domain test driver"
23 Enable support for a test power domain driver implementation, which
24 simply accepts requests to power on/off various HW modules without
[all …]
H A DMakefile5 obj-$(CONFIG_POWER_DOMAIN) += power-domain-uclass.o
6 obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o
7 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain.o
8 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o
9 obj-$(CONFIG_TEGRA186_POWER_DOMAIN) += tegra186-power-domain.o
/rk3399_rockchip-uboot/doc/device-tree-bindings/video/
H A Dintel-gma.txt15 - intel,panel-power-cycle-delay : T4 time sequence (6 = 500ms)
18 - intel,panel-power-up-delay : T1+T2 time sequence
19 - intel,panel-power-down-delay : T3 time sequence
20 - intel,panel-power-backlight-on-delay : T5 time sequence
21 - intel,panel-power-backlight-off-delay : Tx time sequence
33 intel,panel-power-cycle-delay = <6>;
34 intel,panel-power-up-delay = <2000>;
35 intel,panel-power-down-delay = <500>;
36 intel,panel-power-backlight-on-delay = <2000>;
37 intel,panel-power-backlight-off-delay = <2000>;
/rk3399_rockchip-uboot/doc/
H A DREADME.power-framework19 designers strive to cut down power consumption. Hence several different types of
20 devices are now available on the board - namely power managers (PMIC), fuel
35 The "flat" hierarchy for power devices works well when each device performs only
40 to start charging the battery, use PMIC to reduce board's overall power
47 ./include/power/<device_name>_<device_function>.h
48 e.g. ./include/power/max8997_pmic.h
50 ./drivers/power/pmic/power_{core files}.c
51 e.g. ./drivers/power/pmic/power_core.c
53 ./drivers/power/pmic/<device_function>/<device_function>_<device_name>.c
54 e.g. ./drivers/power/pmic/pmic_max8997.c
[all …]
/rk3399_rockchip-uboot/doc/driver-model/
H A Dpmic-framework.txt27 - drivers/power/pmic/pmic-uclass.c
28 - include/power/pmic.h
30 - drivers/power/regulator/regulator-uclass.c
31 - include/power/regulator.h
40 to provide stable, precise and specific voltage power source with over-voltage
84 * Header: 'include/power/pmic.h'
85 * Core: 'drivers/power/pmic/pmic-uclass.c'
89 * Example: 'drivers/power/pmic/max77686.c'
116 * Header: 'include/power/regulator.h'
117 * Core: 'drivers/power/regulator/regulator-uclass.c'
[all …]
/rk3399_rockchip-uboot/drivers/usb/musb-new/
H A Dpic32.c129 u8 power; in pic32_musb_init() local
137 power = musb_readb(musb->mregs, MUSB_POWER); in pic32_musb_init()
138 power = power | MUSB_POWER_RESET; in pic32_musb_init()
139 musb_writeb(musb->mregs, MUSB_POWER, power); in pic32_musb_init()
143 power = power & ~MUSB_POWER_RESET; in pic32_musb_init()
144 musb_writeb(musb->mregs, MUSB_POWER, power); in pic32_musb_init()
211 .power = 250, /* 500mA */
/rk3399_rockchip-uboot/drivers/power/io-domain/
H A DKconfig8 power to be applied to or removed from portions of the SoC (io
9 domains). This may be used to save power. This API provides the
10 means to control such power management hardware.
/rk3399_rockchip-uboot/drivers/usb/musb/
H A Dmusb_hcd.c433 u8 power = readb(&musbr->power); in musb_port_reset() local
436 power &= 0xf0; in musb_port_reset()
437 writeb(power | MUSB_POWER_RESET, &musbr->power); in musb_port_reset()
442 writeb(power & ~MUSB_POWER_RESET, &musbr->power); in musb_port_reset()
444 power = readb(&musbr->power); in musb_port_reset()
445 if (power & MUSB_POWER_HSMODE) in musb_port_reset()
998 u8 power; in usb_lowlevel_init() local
1025 power = readb(&musbr->power); in usb_lowlevel_init()
1026 writeb(power | MUSB_POWER_RESET, &musbr->power); in usb_lowlevel_init()
1032 power = readb(&musbr->power); in usb_lowlevel_init()
[all …]
H A Dmusb_udc.c116 b = readb(&musbr->power); in musb_db_regs()
152 u8 power, devctl; in musb_peri_softconnect() local
155 power = readb(&musbr->power); in musb_peri_softconnect()
156 power &= ~MUSB_POWER_SOFTCONN; in musb_peri_softconnect()
157 writeb(power, &musbr->power); in musb_peri_softconnect()
167 power = readb(&musbr->power); in musb_peri_softconnect()
168 power |= MUSB_POWER_SOFTCONN; in musb_peri_softconnect()
173 power &= ~MUSB_POWER_HSENAB; in musb_peri_softconnect()
174 writeb(power, &musbr->power); in musb_peri_softconnect()
/rk3399_rockchip-uboot/drivers/mtd/ubi/
H A Dcrc32defs.h23 # error CRC_LE_BITS must be a power of 2 between 1 and 8
31 # error CRC_BE_BITS must be a power of 2 between 1 and 8
/rk3399_rockchip-uboot/arch/mips/dts/
H A Dbrcm,bcm6328.dtsi9 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
126 periph_pwr: power-controller@10001848 {
127 compatible = "brcm,bcm6328-power-domain";
129 #power-domain-cells = <1>;
H A Dbrcm,bcm63268.dtsi9 #include <dt-bindings/power-domain/bcm63268-power-domain.h>
133 periph_pwr: power-controller@1000184c {
134 compatible = "brcm,bcm6328-power-domain";
136 #power-domain-cells = <1>;
/rk3399_rockchip-uboot/drivers/
H A DMakefile37 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/
38 obj-$(CONFIG_SPL_DM_PMIC) += power/pmic/
39 obj-$(CONFIG_SPL_DM_REGULATOR) += power/regulator/
40 obj-$(CONFIG_SPL_DM_FUEL_GAUGE) += power/fuel_gauge/
41 obj-$(CONFIG_SPL_DM_FUEL_GAUGE) += power/charge/
100 obj-$(CONFIG_DM_POWER_DELIVERY) += power/power_delivery/
/rk3399_rockchip-uboot/board/gdsys/common/
H A Dch7301.c40 int ch7301_probe(unsigned screen, bool power) in ch7301_probe() argument
52 if (power) { in ch7301_probe()
/rk3399_rockchip-uboot/doc/device-tree-bindings/firmware/
H A Dnvidia,tegra186-bpmp.txt4 booting process handling and offloading the power management, clock
20 - #power-domain-cells : Should be 1.
30 This node is a clock, power domain, and reset provider. See the following
36 - ../power/power_domain.txt
37 - <dt-bindings/power/tegra186-powergate.h>
97 #power-domain-cells = <1>;

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