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Searched refs:phys (Results 1 – 25 of 112) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/mach-mvebu/armada8k/
H A Dcpu.c36 .phys = 0xf4000000UL,
44 .phys = 0xfa000000UL,
53 .phys = 0x0UL,
61 .phys = 0xf0000000UL,
69 .phys = 0xf2000000UL,
77 .phys = 0xf6000000UL,
/rk3399_rockchip-uboot/arch/arm/mach-bcm283x/
H A Dphys2bus.c10 unsigned long phys_to_bus(unsigned long phys) in phys_to_bus() argument
13 return 0xc0000000 | phys; in phys_to_bus()
15 return 0x40000000 | phys; in phys_to_bus()
/rk3399_rockchip-uboot/include/
H A Dphys2bus.h11 unsigned long phys_to_bus(unsigned long phys);
14 static inline unsigned long phys_to_bus(unsigned long phys) in phys_to_bus() argument
16 return phys; in phys_to_bus()
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/s32v234/
H A Dcpu.c36 .phys = S32V234_IRAM_BASE,
42 .phys = S32V234_DRAM_BASE1,
48 .phys = S32V234_PERIPH_BASE,
56 .phys = S32V234_DRAM_BASE2,
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/zynqmp/
H A Dcpu.c22 .phys = 0x0UL,
28 .phys = 0x80000000UL,
35 .phys = 0xf8000000UL,
43 .phys = 0xffe00000UL,
50 .phys = 0x400000000UL,
57 .phys = 0x600000000UL,
63 .phys = 0xe00000000UL,
/rk3399_rockchip-uboot/drivers/usb/dwc3/
H A Ddwc3-meson-g12a.c112 struct phy phys[PHY_COUNT]; member
154 if (!priv->phys[i].dev) in dwc3_meson_g12a_usb2_init()
267 if (!priv->phys[USB2_OTG_PHY].dev) in dwc3_meson_g12a_force_mode()
301 &priv->phys[i]); in dwc3_meson_g12a_get_phys()
403 if (!priv->phys[i].dev) in dwc3_meson_g12a_probe()
406 ret = generic_phy_init(&priv->phys[i]); in dwc3_meson_g12a_probe()
415 if (!priv->phys[i].dev) in dwc3_meson_g12a_probe()
418 generic_phy_exit(&priv->phys[i]); in dwc3_meson_g12a_probe()
434 if (!priv->phys[i].dev) in dwc3_meson_g12a_remove()
437 generic_phy_exit(&priv->phys[i]); in dwc3_meson_g12a_remove()
/rk3399_rockchip-uboot/drivers/pci/
H A Dpcie_layerscape.c96 u64 phys, u64 bus_addr, pci_size_t size) in ls_pcie_atu_outbound_set() argument
99 dbi_writel(pcie, (u32)phys, PCIE_ATU_LOWER_BASE); in ls_pcie_atu_outbound_set()
100 dbi_writel(pcie, phys >> 32, PCIE_ATU_UPPER_BASE); in ls_pcie_atu_outbound_set()
101 dbi_writel(pcie, (u32)phys + size - 1, PCIE_ATU_LIMIT); in ls_pcie_atu_outbound_set()
110 int bar, u64 phys) in ls_pcie_atu_inbound_set() argument
113 dbi_writel(pcie, (u32)phys, PCIE_ATU_LOWER_TARGET); in ls_pcie_atu_inbound_set()
114 dbi_writel(pcie, phys >> 32, PCIE_ATU_UPPER_TARGET); in ls_pcie_atu_inbound_set()
378 u64 phys = CONFIG_SYS_PCI_EP_MEMORY_BASE; in ls_pcie_ep_setup_atu() local
381 ls_pcie_atu_inbound_set(pcie, 0, 0, phys); in ls_pcie_ep_setup_atu()
383 phys += PCIE_BAR1_SIZE; in ls_pcie_ep_setup_atu()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-rmobile/
H A Dmemmap-r8a7795.c13 .phys = 0x0UL,
19 .phys = 0x80000000UL,
H A Dmemmap-r8a7796.c13 .phys = 0x0UL,
19 .phys = 0xe0000000UL,
/rk3399_rockchip-uboot/arch/arm/mach-uniphier/arm64/
H A Dmem_map.c14 .phys = 0x00000000,
22 .phys = 0x80000000,
/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Darm64-mmu.c18 .phys = 0x0UL,
25 .phys = 0x80000000UL,
/rk3399_rockchip-uboot/arch/arm/mach-snapdragon/
H A Dsysmap-apq8016.c15 .phys = 0x0UL, /* Peripheral block */
22 .phys = 0x80000000UL, /* DDR */
/rk3399_rockchip-uboot/board/cavium/thunderx/
H A Dthunderx.c49 .phys = 0x000000000000UL,
54 .phys = 0x800000000000UL,
60 .phys = 0x840000000000UL,
/rk3399_rockchip-uboot/include/rockchip/
H A Drkce_buf.h20 #define rkce_cma_phys2virt(phys) ((unsigned long)phys) argument
/rk3399_rockchip-uboot/arch/arm/mach-exynos/
H A Dmmu-arm64.c17 .phys = 0x10000000UL,
24 .phys = 0x40000000UL,
/rk3399_rockchip-uboot/drivers/usb/common/
H A Dfsl-dt-fixup.c138 static const char * const phys[] = { "ulpi", "utmi", "utmi_dual" }; in fsl_fdt_fixup_dr_usb() local
165 for (j = 0; j < ARRAY_SIZE(phys); j++) { in fsl_fdt_fixup_dr_usb()
167 phys[j])) { in fsl_fdt_fixup_dr_usb()
182 dr_phy_type = phys[phy_idx]; in fsl_fdt_fixup_dr_usb()
186 dr_phy_type = phys[2]; in fsl_fdt_fixup_dr_usb()
/rk3399_rockchip-uboot/arch/arm/mach-mvebu/armada3700/
H A Dcpu.c34 .phys = 0x0UL,
42 .phys = 0xd0000000UL,
/rk3399_rockchip-uboot/board/broadcom/bcmns2/
H A Dnorthstar2.c13 .phys = 0x0UL,
20 .phys = 0x80000000UL,
/rk3399_rockchip-uboot/arch/arm/mach-meson/
H A Dboard.c56 .phys = 0x0UL,
62 .phys = 0x80000000UL,
/rk3399_rockchip-uboot/board/armltd/vexpress64/
H A Dvexpress64.c35 .phys = 0x0UL,
42 .phys = 0x80000000UL,
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3328/
H A Drk3328.c27 .phys = 0x0UL,
33 .phys = 0xff000000UL,
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3576/
H A Drk3576.c111 .phys = 0x20000000UL,
118 .phys = 0x3fe70000UL,
125 .phys = 0x40000000UL,
131 .phys = 0x100000000UL,
137 .phys = 0x900000000UL,
/rk3399_rockchip-uboot/board/hisilicon/poplar/
H A Dpoplar.c21 .phys = 0x0UL,
27 .phys = 0x80000000UL,
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3399/
H A Drk3399.c24 .phys = 0x0UL,
30 .phys = 0xf8000000UL,
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dcpu.c106 switch (final_map[i].phys) { in fix_pcie_mmu_map()
108 final_map[i].phys = 0x2000000000ULL; in fix_pcie_mmu_map()
113 final_map[i].phys = 0x2800000000ULL; in fix_pcie_mmu_map()
118 final_map[i].phys = 0x3000000000ULL; in fix_pcie_mmu_map()
123 final_map[i].phys = 0x3800000000ULL; in fix_pcie_mmu_map()
164 final_map[index].phys = gd->bd->bi_dram[0].start; in final_mmu_setup()
171 final_map[index].phys = gd->bd->bi_dram[1].start; in final_mmu_setup()
182 final_map[index].phys = gd->bd->bi_dram[2].start; in final_mmu_setup()
205 final_map[index].phys = final_map[index].virt; in final_mmu_setup()

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