| /rk3399_rockchip-uboot/drivers/video/drm/ |
| H A D | inno_video_combo_phy.c | 334 static inline void phy_update_bits(struct inno_video_phy *inno, in phy_update_bits() function
408 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03, in inno_mipi_dphy_max_2_5GHz_pll_enable()
410 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03, in inno_mipi_dphy_max_2_5GHz_pll_enable()
412 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04, in inno_mipi_dphy_max_2_5GHz_pll_enable()
414 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x08, in inno_mipi_dphy_max_2_5GHz_pll_enable()
416 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x0b, in inno_mipi_dphy_max_2_5GHz_pll_enable()
419 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01, in inno_mipi_dphy_max_2_5GHz_pll_enable()
427 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03, in inno_mipi_dphy_max_1GHz_pll_enable()
429 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03, in inno_mipi_dphy_max_1GHz_pll_enable()
431 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04, in inno_mipi_dphy_max_1GHz_pll_enable()
[all …]
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| H A D | inno_video_phy.c | 94 static inline void phy_update_bits(struct inno_video_phy *inno, in phy_update_bits() function
146 phy_update_bits(inno, 0x0030, DISABLE_PLL, 0); in inno_video_phy_power_on()
154 phy_update_bits(inno, 0x0084, ENABLE_TX, ENABLE_TX); in inno_video_phy_power_on()
163 phy_update_bits(inno, 0x0084, ENABLE_TX, 0); in inno_video_phy_power_off()
164 phy_update_bits(inno, 0x0030, DISABLE_PLL, DISABLE_PLL); in inno_video_phy_power_off()
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| H A D | samsung_mipi_dcphy.c | 1246 static inline void phy_update_bits(struct samsung_mipi_dcphy *samsung, in phy_update_bits() function
1312 phy_update_bits(samsung, BIAS_CON4, I_MUX_SEL_MASK, I_MUX_SEL(2)); in samsung_mipi_dcphy_bias_block_enable()
1321 phy_update_bits(samsung, PLL_CON0, S_MASK | P_MASK, in samsung_mipi_dcphy_pll_configure()
1324 phy_update_bits(samsung, PLL_CON2, M_MASK, M(samsung->pll.fbdiv)); in samsung_mipi_dcphy_pll_configure()
1329 phy_update_bits(samsung, PLL_CON4, SSCG_EN, SSCG_EN); in samsung_mipi_dcphy_pll_configure()
1467 phy_update_bits(samsung, PLL_CON0, PLL_EN, PLL_EN); in samsung_mipi_dcphy_pll_enable()
1477 phy_update_bits(samsung, PLL_CON0, PLL_EN, 0); in samsung_mipi_dcphy_pll_disable()
1483 phy_update_bits(samsung, DPHY_MC_GNR_CON0, PHY_ENABLE, PHY_ENABLE); in samsung_mipi_dphy_lane_enable()
1488 phy_update_bits(samsung, DPHY_MD3_GNR_CON0, in samsung_mipi_dphy_lane_enable()
1493 phy_update_bits(samsung, COMBO_MD2_GNR_CON0, in samsung_mipi_dphy_lane_enable()
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| /rk3399_rockchip-uboot/drivers/phy/ |
| H A D | phy-rockchip-inno-usb2.c | 216 static inline void phy_update_bits(void __iomem *reg, u32 mask, u32 val) in phy_update_bits() function
867 phy_update_bits(rphy->phy_base + 0x30, GENMASK(2, 0), 0x07); in rv1103b_usb2phy_tuning()
870 phy_update_bits(rphy->phy_base + 0x40, GENMASK(5, 3), (0x01 << 3)); in rv1103b_usb2phy_tuning()
873 phy_update_bits(rphy->phy_base + 0x64, GENMASK(6, 3), (0x00 << 3)); in rv1103b_usb2phy_tuning()
879 phy_update_bits(rphy->phy_base + 0x11c, GENMASK(4, 0), 0x17); in rv1103b_usb2phy_tuning()
882 phy_update_bits(rphy->phy_base + 0x124, GENMASK(4, 2), (0x03 << 2)); in rv1103b_usb2phy_tuning()
885 phy_update_bits(rphy->phy_base + 0x1a4, GENMASK(7, 4), (0x01 << 4)); in rv1103b_usb2phy_tuning()
886 phy_update_bits(rphy->phy_base + 0x1b4, GENMASK(7, 4), (0x01 << 4)); in rv1103b_usb2phy_tuning()
892 phy_update_bits(rphy->phy_base + 0x60, GENMASK(1, 0), 0x0); in rv1103b_usb2phy_tuning()
893 phy_update_bits(rphy->phy_base + 0x64, GENMASK(7, 7), BIT(7)); in rv1103b_usb2phy_tuning()
[all …]
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