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Searched refs:mult (Results 1 – 25 of 33) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/dts/
H A Domap36xx-omap3430es2plus-clocks.dtsi38 clock-mult = <1>;
54 clock-mult = <1>;
78 clock-mult = <1>;
86 clock-mult = <1>;
94 clock-mult = <1>;
102 clock-mult = <1>;
110 clock-mult = <1>;
118 clock-mult = <1>;
126 clock-mult = <1>;
134 clock-mult = <1>;
[all …]
H A Dam33xx-clocks.dtsi23 clock-mult = <1>;
31 clock-mult = <1>;
39 clock-mult = <1>;
47 clock-mult = <1>;
55 clock-mult = <1>;
63 clock-mult = <1>;
71 clock-mult = <1>;
79 clock-mult = <1>;
87 clock-mult = <1>;
95 clock-mult = <1>;
[all …]
H A Dam43xx-clocks.dtsi39 clock-mult = <1>;
47 clock-mult = <1>;
55 clock-mult = <1>;
63 clock-mult = <1>;
71 clock-mult = <1>;
79 clock-mult = <1>;
87 clock-mult = <1>;
95 clock-mult = <1>;
103 clock-mult = <1>;
321 clock-mult = <1>;
[all …]
H A Domap36xx-clocks.dtsi74 clock-mult = <1>;
78 clock-mult = <1>;
82 ti,clock-mult = <1>;
86 ti,clock-mult = <1>;
90 clock-mult = <1>;
H A Dkeystone-clocks.dtsi31 clock-mult = <1>;
40 clock-mult = <1>;
69 clock-mult = <1>;
78 clock-mult = <1>;
87 clock-mult = <1>;
96 clock-mult = <1>;
105 clock-mult = <1>;
114 clock-mult = <1>;
123 clock-mult = <1>;
132 clock-mult = <1>;
[all …]
H A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi15 clock-mult = <1>;
23 clock-mult = <1>;
58 clock-mult = <1>;
66 clock-mult = <1>;
74 clock-mult = <1>;
82 clock-mult = <1>;
90 clock-mult = <1>;
H A Domap3xxx-clocks.dtsi46 clock-mult = <2>;
54 clock-mult = <2>;
62 clock-mult = <2>;
70 clock-mult = <1>;
78 clock-mult = <1>;
216 clock-mult = <2>;
233 clock-mult = <1>;
258 clock-mult = <2>;
275 clock-mult = <1>;
305 clock-mult = <1>;
[all …]
H A Ddra7xx-clocks.dtsi111 clock-mult = <1>;
290 clock-mult = <1>;
316 clock-mult = <1>;
324 clock-mult = <1>;
358 clock-mult = <1>;
392 clock-mult = <1>;
437 clock-mult = <1>;
497 clock-mult = <1>;
505 clock-mult = <1>;
513 clock-mult = <1>;
[all …]
H A Domap34xx-omap36xx-clocks.dtsi15 clock-mult = <1>;
80 clock-mult = <1>;
128 clock-mult = <1>;
152 clock-mult = <1>;
H A Dstih407-clock.dtsi33 clock-mult = <1>;
79 clock-mult = <1>;
H A Dstih410-clock.dtsi35 clock-mult = <1>;
81 clock-mult = <1>;
H A Dsun5i.dtsi95 clock-mult = <1>;
136 clock-mult = <2>;
177 clock-mult = <2>;
H A Dsun8i-a83t.dtsi145 clock-mult = <1>;
H A Dsun5i-gr8.dtsi95 clock-mult = <1>;
136 clock-mult = <2>;
177 clock-mult = <2>;
/rk3399_rockchip-uboot/cmd/
H A Dmisc.c30 uint mult = CONFIG_SYS_HZ / 10; in do_sleep() local
31 for (frpart++; *frpart != '\0' && mult > 0; frpart++) { in do_sleep()
36 mdelay += (*frpart - '0') * mult; in do_sleep()
37 mult /= 10; in do_sleep()
/rk3399_rockchip-uboot/arch/arm/mach-keystone/
H A Dclock.c70 pllctl_reg_write(data->pll, mult, pllm & PLLM_MULT_LO_MASK); in configure_mult_div()
282 unsigned long mult = 1, prediv = 1, output_div = 2; in pll_freq_get() local
292 mult = ((tmp & CFG_PLLCTL0_PLLM_HI_MASK) >> in pll_freq_get()
294 (pllctl_reg_read(pll, mult) & in pll_freq_get()
300 ret = ret / prediv / output_div * mult; in pll_freq_get()
333 mult = ((tmp & CFG_PLLCTL0_PLLM_MASK) >> in pll_freq_get()
337 ret = ((ret / prediv) * mult) / output_div; in pll_freq_get()
/rk3399_rockchip-uboot/drivers/clk/renesas/
H A Dclk-rcar-gen3.c98 unsigned int mult; member
119 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
796 u32 value, mult, rate = 0; in gen3_clk_get_rate() local
845 mult = (((value >> 24) & 0x7f) + 1) * 2; in gen3_clk_get_rate()
846 rate = gen3_clk_get_rate(&parent) * mult; in gen3_clk_get_rate()
848 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate()
860 mult = (((value >> 24) & 0x7f) + 1) * 2; in gen3_clk_get_rate()
861 rate = gen3_clk_get_rate(&parent) * mult; in gen3_clk_get_rate()
863 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate()
875 mult = (((value >> 24) & 0x7f) + 1) * 2; in gen3_clk_get_rate()
[all …]
/rk3399_rockchip-uboot/drivers/clk/
H A Dclk_pic32.c94 u32 iclk, idiv, odiv, mult; in pic32_get_pll_rate() local
101 mult = ((v >> 16) & PLLMUL_MASK) + 1; in pic32_get_pll_rate()
112 return ((plliclk / idiv) * mult) / odiv; in pic32_get_pll_rate()
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx7ulp/
H A Dscg.c474 u32 reg, pre_div, infreq, mult; in decode_pll() local
494 mult = (reg & SCG1_SPLL_CFG_MULT_MASK) >> in decode_pll()
509 return infreq * mult + infreq * num / denom; in decode_pll()
523 mult = (reg & SCG_APLL_CFG_MULT_MASK) >> in decode_pll()
538 return infreq * mult + infreq * num / denom; in decode_pll()
/rk3399_rockchip-uboot/arch/arm/mach-keystone/include/mach/
H A Dclock_defs.h20 u32 mult; /* 10 */ member
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx5/
H A Dclock.c218 u32 mult; in get_fpm() local
222 mult = 1024; in get_fpm()
224 mult = 512; in get_fpm()
226 return MXC_CLK32 * mult; in get_fpm()
/rk3399_rockchip-uboot/drivers/video/drm/
H A Drockchip_vop.h166 #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) argument
/rk3399_rockchip-uboot/drivers/mmc/
H A Dmmc.c1753 uint mult, freq, tran_speed; local
1847 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1849 tran_speed = freq * mult;
1979 uint mult = (ext_csd[idx + 2] << 16) + local
1981 if (mult)
1985 mmc->capacity_gp[i] = mult;
/rk3399_rockchip-uboot/drivers/usb/cdns3/
H A Dgadget.c1556 u8 mult = 0; in cdns3_ep_config() local
1580 mult = CDNS3_EP_ISO_HS_MULT - 1; in cdns3_ep_config()
1581 buffering = mult + 1; in cdns3_ep_config()
1593 mult = 0; in cdns3_ep_config()
1597 buffering = (mult + 1) * in cdns3_ep_config()
1626 EP_CFG_MULT(mult) | in cdns3_ep_config()
/rk3399_rockchip-uboot/drivers/usb/host/
H A Dxhci.c514 unsigned int mult; in xhci_set_configuration() local
567 mult = xhci_get_endpoint_mult(udev, endpt_desc, in xhci_set_configuration()
587 EP_INTERVAL(interval) | EP_MULT(mult)); in xhci_set_configuration()

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