| #
b899f9cc |
| 15-Apr-2025 |
Chaoyi Chen <chaoyi.chen@rock-chips.com> |
video/drm: vop: Add support for force mcu rdn
The RV1126B introduce force RDN feature in MCU interface, which allow to output high voltage level on the MCU_RDN line when MCU is sending data, especia
video/drm: vop: Add support for force mcu rdn
The RV1126B introduce force RDN feature in MCU interface, which allow to output high voltage level on the MCU_RDN line when MCU is sending data, especially for data in the write direction. This feature helps avoid unintended level flips on the RDN line.
Change-Id: If697b937cdf2bcfb471f60bbd10759c95d8bb285 Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
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| #
10a896e2 |
| 15-Nov-2024 |
Chaoyi Chen <chaoyi.chen@rock-chips.com> |
video/drm: vop: Add support for RV1126B vop
RV1126B VOP supports BT1120/BT656/MCU/RGB display interfaces with maximum output resolution of 1920x1080@60fps.
Change-Id: Ida94342c5f65d17d7772d5828a854
video/drm: vop: Add support for RV1126B vop
RV1126B VOP supports BT1120/BT656/MCU/RGB display interfaces with maximum output resolution of 1920x1080@60fps.
Change-Id: Ida94342c5f65d17d7772d5828a85473558380dc2 Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
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| #
0c4bb35c |
| 03-Jul-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: vop: support bt1120/bt656 for rk3506
Change-Id: I8f1409da3f4683701eafc409431b13088c615f71 Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
df0a5c43 |
| 06-Feb-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: display: use color_encoding and color_range instead of private COLOR_SPACE
The old method to description color space and range is borrowing V4L2 defined, It's difficult to understand, so
video/drm: display: use color_encoding and color_range instead of private COLOR_SPACE
The old method to description color space and range is borrowing V4L2 defined, It's difficult to understand, so we change to DRM defined property.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I7eacc60dfda912b9becae1ce026cdb82eebef7f8
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| #
72f233a9 |
| 26-Jan-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: vop: add support for rk3576 vopl
RK3576 VOP_LITE has only one win2 which supports ARGB888/ RGB565/RGB888 formats.
In addition, VOP_LITE whose max output resolution is 1920x1080 supports
video/drm: vop: add support for rk3576 vopl
RK3576 VOP_LITE has only one win2 which supports ARGB888/ RGB565/RGB888 formats.
In addition, VOP_LITE whose max output resolution is 1920x1080 supports BT1120/BT656/MCU/RGB interfaces, and can also support eDP/HDMI/MIPI by the 1to4 module.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I81deec2decae0ac5feb2293d833eb5e29ef1f20a
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| #
fc8b0d66 |
| 29-Jan-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: vop: update VOP_GRF_SET() func to support different grf domains
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I6039388e568b35a69a4c507279f7c28661e33c28
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| #
32328971 |
| 29-Mar-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: vop: add support for bg/rb/rg/delta/dummy swap ctrl
One is bg/rb/rg/delta/dummy, such as RK3288, RK3328 and RK3399. The other is bg/delta/rb/rg/dummy, such as RK3308, RV1126 and RV1106.
video/drm: vop: add support for bg/rb/rg/delta/dummy swap ctrl
One is bg/rb/rg/delta/dummy, such as RK3288, RK3328 and RK3399. The other is bg/delta/rb/rg/dummy, such as RK3308, RV1126 and RV1106.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: If5bb3f32961a7da288ddb23fcd8d79ff51c43af3
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| #
54f7137b |
| 18-Jul-2022 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: vop: add support for rv1106
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I5bfdaaa7c37c4c528deac9e67fb217f565a9fe76
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| #
4c765862 |
| 05-Aug-2022 |
Damon Ding <damon.ding@rock-chips.com> |
drm/rockchip: display: add crtc plane check of scale factor
Check scale factor in vop/vop2 plane_check function.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: Iaffbacb251a58825d7
drm/rockchip: display: add crtc plane check of scale factor
Check scale factor in vop/vop2 plane_check function.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: Iaffbacb251a58825d7247da7f14d118c10b73bf8
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| #
ecc31b6e |
| 16-Oct-2021 |
Andy Yan <andy.yan@rock-chips.com> |
drm/rockchip: vop2: Add support for rk3588
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: Ia0d0430124123fb0710bbba6adacbdfb55d7a149
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| #
6b898587 |
| 23-Aug-2021 |
Damon Ding <damon.ding@rock-chips.com> |
drm/rockchip: vop: support rk3288 MCU display
1.Add MCU display mode related register definition. 2.Change the control method of RS pin to GPIO control, because cannot control RS pin through VOP_MCU
drm/rockchip: vop: support rk3288 MCU display
1.Add MCU display mode related register definition. 2.Change the control method of RS pin to GPIO control, because cannot control RS pin through VOP_MCU_CTRL register.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I59cbafc2c1d6350e9028c45d64f6897243414a33
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| #
dac93f83 |
| 18-Aug-2021 |
Chris Zhong <zyw@rock-chips.com> |
drm/rockchip: vop: correct the dclk_inv
The property pixelclk-active=1 in dts means dclk polarity is positive edge, and set 0 to GRF or VOP register: lcdc_dclk_inv_sel. This bit is reversed in uboot
drm/rockchip: vop: correct the dclk_inv
The property pixelclk-active=1 in dts means dclk polarity is positive edge, and set 0 to GRF or VOP register: lcdc_dclk_inv_sel. This bit is reversed in uboot, this patch corrects it. In addition, the configuration of RV1126 has been added in this patch.
Signed-off-by: Chris Zhong <zyw@rock-chips.com> Change-Id: I93af7e052fb18782a81e9c9b762a57411ef9283f
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| #
a144d23d |
| 29-Apr-2020 |
Andy Yan <andy.yan@rock-chips.com> |
drm/rockchip: vop: Add support for rv1126
Change-Id: I762158891605c1a87fd7d3a7c685052ab9125b31 Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
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| #
cf53642a |
| 09-May-2020 |
Sandy Huang <hjc@rock-chips.com> |
drm/rockchip: filter the edid modes accordinig to vop max output resolution
Signed-off-by: Sandy Huang <hjc@rock-chips.com> Change-Id: Id338a2b3bc659799c4fb391d36fa814c44e0274d
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| #
b7618fd3 |
| 13-Jul-2018 |
Sandy Huang <hjc@rock-chips.com> |
drm/rockchip: rk3399 vop: add support win csc
support rgb2yuv for yuv output, the csc matrix maybe bt601,bt601l,bt709 and bt2020, depend on connect output color space.
Change-Id: Ibd8defc9a2519f850
drm/rockchip: rk3399 vop: add support win csc
support rgb2yuv for yuv output, the csc matrix maybe bt601,bt601l,bt709 and bt2020, depend on connect output color space.
Change-Id: Ibd8defc9a2519f850d8f3af7ee350022e5ee2ee4 Signed-off-by: Sandy Huang <hjc@rock-chips.com>
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| #
543c0e78 |
| 12-Jul-2018 |
Sandy Huang <hjc@rock-chips.com> |
drm/rockchip: vop: fix VOP_REG_SUPPORT judge wrong
If the register isn't define at rockchip_vop_reg.c, the default value of reg.major is 0, this will lead to judge error. so we add reg.mask conditio
drm/rockchip: vop: fix VOP_REG_SUPPORT judge wrong
If the register isn't define at rockchip_vop_reg.c, the default value of reg.major is 0, this will lead to judge error. so we add reg.mask conditions because if it's defined register, the reg.mask can't be 0.
Change-Id: I368276d2d81983b5c5dbf591503def1de49ccdc1 Signed-off-by: Sandy Huang <hjc@rock-chips.com>
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| #
3a06149e |
| 20-Apr-2018 |
Sandy Huang <hjc@rock-chips.com> |
drm/rockchip: vop: add support dclk polarity invert config
some platform like rk3288,rk3368 and px30, the rgb/lvds dclk polarity need to config grf config, other platform can config vop register to
drm/rockchip: vop: add support dclk polarity invert config
some platform like rk3288,rk3368 and px30, the rgb/lvds dclk polarity need to config grf config, other platform can config vop register to set dclk invert.
Change-Id: Ica3b7b388d7650628c08007b327753caeeba3b0e Signed-off-by: Sandy Huang <hjc@rock-chips.com>
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| #
2735489a |
| 24-Feb-2018 |
Sandy Huang <hjc@rock-chips.com> |
drm/rockchip: rk3328 vop: add support 4096 output
add max_output to identify vop max output resolution.
Change-Id: I3d6f0f63a09d6b6f728aeb52cd821bf82bfcf4f8 Signed-off-by: Sandy Huang <hjc@rock-chi
drm/rockchip: rk3328 vop: add support 4096 output
add max_output to identify vop max output resolution.
Change-Id: I3d6f0f63a09d6b6f728aeb52cd821bf82bfcf4f8 Signed-off-by: Sandy Huang <hjc@rock-chips.com>
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| #
620af6a3 |
| 28-Feb-2018 |
Sandy Huang <hjc@rock-chips.com> |
drm/rockchip: vop: update ymirror support
some vop unsupport ymirror, the yaddr calc is wrong.
Change-Id: I4b95eb21d16ffa14a4db484b7a45856ceb19425d Signed-off-by: Sandy Huang <hjc@rock-chips.com>
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| #
2b34f307 |
| 09-Nov-2017 |
Mark Yao <mark.yao@rock-chips.com> |
video/rockchip: vop: enable axi outstanding function
On some scenes, win lite area may flush with short width.
As the Technical Reference Manual description, need enable axi outstanding function if
video/rockchip: vop: enable axi outstanding function
On some scenes, win lite area may flush with short width.
As the Technical Reference Manual description, need enable axi outstanding function if use IOMMU.
From testing, after setting axi outstanding max number to 30 solve windows flush problem.
Change-Id: I7eb41b6169776260257a94177f84c04d37b604e5 Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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| #
09b01f9e |
| 25-Jan-2018 |
Algea Cao <algea.cao@rock-chips.com> |
drm/rockchip: vop: Support drm tve
Change-Id: Ie32dda5e3c825d03bc5c864a6b346113196c484d Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
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| #
b0dbe9a0 |
| 16-Jan-2018 |
Sandy Huang <hjc@rock-chips.com> |
drm/rockchip: rk3328 vop: set frame effect when in interlace mode
This will improve display quality for P in i output.
Change-Id: If34b8879a41ea10ce756c1feebc2e9df64183261 Signed-off-by: Sandy Huan
drm/rockchip: rk3328 vop: set frame effect when in interlace mode
This will improve display quality for P in i output.
Change-Id: If34b8879a41ea10ce756c1feebc2e9df64183261 Signed-off-by: Sandy Huang <hjc@rock-chips.com> (Cherry pick from commit 99096b14d61a9ef456745e1ffcb036d38bdda008)
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| #
79feefb1 |
| 26-Feb-2018 |
Sandy Huang <hjc@rock-chips.com> |
video/rockchip: vop: add support CSC function for HDMI YUV output
add CSC config for YUV output mode
Change-Id: I9b53c3b3bdc0fc1a733897474c126042d17c3ac9 Signed-off-by: Sandy Huang <hjc@rock-chips
video/rockchip: vop: add support CSC function for HDMI YUV output
add CSC config for YUV output mode
Change-Id: I9b53c3b3bdc0fc1a733897474c126042d17c3ac9 Signed-off-by: Sandy Huang <hjc@rock-chips.com> (Cherry-pick from commit 34d6280a1ae02cc3c98aa8e6d32151b37fd849c6)
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| #
7130fbf6 |
| 02-Feb-2018 |
Sandy Huang <hjc@rock-chips.com> |
drm/rockchip: vop: add support px30
PX30 have two vop(vopb and vopl), the vopb have win0, win1 and win2, the vopl only have win1,most of register define is same with rk3366, so we porting the rk3366
drm/rockchip: vop: add support px30
PX30 have two vop(vopb and vopl), the vopb have win0, win1 and win2, the vopl only have win1,most of register define is same with rk3366, so we porting the rk3366 vop register define for px30.
win0: support yuv and scale; win1: support rgbx and afbdc format(vopb only); win2: support rgbx and four region;
Change-Id: Ib9b796516e2bd43d98c79d5d3226a9e167739f76 Signed-off-by: Sandy Huang <hjc@rock-chips.com>
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| #
186f8572 |
| 15-Sep-2017 |
Mark Yao <mark.yao@rock-chips.com> |
drm/rockhcip: add drm rockchip display support
Change-Id: I5ef0e29d1e0855a7aa47bd0737835b79c53bf25a Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
|