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Searched refs:max_lane_count (Results 1 – 5 of 5) sorted by relevance

/rk3399_rockchip-uboot/drivers/video/drm/
H A Danalogix_dp.c53 u32 max_lane_count; member
1097 ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count, in analogix_dp_connector_enable()
1191 u32 max_link_rate, max_lane_count; in analogix_dp_mode_valid() local
1203 max_lane_count = min_t(u32, dp->video_info.max_lane_count, dp->link_train.lane_count); in analogix_dp_mode_valid()
1207 max_lane_count)) in analogix_dp_mode_valid()
1375 dp->video_info.max_lane_count = num_lanes; in analogix_dp_parse_dt()
1463 dp->video_info.max_lane_count = pdata->max_lane_count; in analogix_dp_probe()
1488 .max_lane_count = 4,
1495 .max_lane_count = 4,
1506 .max_lane_count = 4,
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H A Danalogix_dp.h602 enum link_lane_count_type max_lane_count; member
H A Danalogix_dp_reg.c79 for (i = 0; i < dp->video_info.max_lane_count; i++) in analogix_dp_set_lane_map()
/rk3399_rockchip-uboot/drivers/video/tegra124/
H A Ddp.c420 link_cfg->max_lane_count); in tegra_dc_dp_dump_link_cfg()
467 cfg->lane_count = cfg->max_lane_count; in _tegra_dp_lower_link_config()
668 link_cfg->max_lane_count = dpcd_data & DP_MAX_LANE_COUNT_MASK; in tegra_dc_dp_init_max_link_cfg()
710 link_cfg->lane_count = link_cfg->max_lane_count; in tegra_dc_dp_init_max_link_cfg()
1363 if (!link_cfg->max_link_bw || !link_cfg->max_lane_count) { in tegra_dc_dp_explore_link_cfg()
1373 temp_cfg.lane_count = temp_cfg.max_lane_count; in tegra_dc_dp_explore_link_cfg()
H A Dsor.h845 u8 max_lane_count; member