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/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Dxusb-padctl-common.c77 struct tegra_xusb_padctl_group *group, in tegra_xusb_padctl_group_parse_dt() argument
83 group->name = ofnode_get_name(node); in tegra_xusb_padctl_group_parse_dt()
91 group->num_pins = len; in tegra_xusb_padctl_group_parse_dt()
93 for (i = 0; i < group->num_pins; i++) { in tegra_xusb_padctl_group_parse_dt()
95 &group->pins[i]); in tegra_xusb_padctl_group_parse_dt()
102 group->num_pins = len; in tegra_xusb_padctl_group_parse_dt()
105 &group->func); in tegra_xusb_padctl_group_parse_dt()
111 group->iddq = ofnode_read_u32_default(node, "nvidia,iddq", -1); in tegra_xusb_padctl_group_parse_dt()
149 const struct tegra_xusb_padctl_group *group) in tegra_xusb_padctl_group_apply() argument
153 for (i = 0; i < group->num_pins; i++) { in tegra_xusb_padctl_group_apply()
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H A Dpinmux-common.c109 #define DRV_REG(group) _R(TEGRA_PMX_SOC_DRV_GROUP_BASE_REG + ((group) * 4)) argument
111 #define MIPIPADCTRL_REG(group) _R(TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG + ((group) * 4)) argument
/rk3399_rockchip-uboot/drivers/net/phy/
H A Drockchip-fephy.c46 #define CFGCNTL_WRITE(group, reg) (CFGCNTL_WR | ((group) << CFGCNTL_GROUP_SEL) \ argument
48 #define CFGCNTL_READ(group, reg) (CFGCNTL_RD | ((group) << CFGCNTL_GROUP_SEL) \ argument
63 static int rockchip_fephy_group_read(struct phy_device *phydev, u8 group, u32 reg) in rockchip_fephy_group_read() argument
67 ret = phy_write(phydev, MDIO_DEVAD_NONE, SMI_ADDR_CFGCNTL, CFGCNTL_READ(group, reg)); in rockchip_fephy_group_read()
71 if (group) in rockchip_fephy_group_read()
78 static int rockchip_fephy_group_write(struct phy_device *phydev, u8 group, in rockchip_fephy_group_write() argument
87 return phy_write(phydev, MDIO_DEVAD_NONE, SMI_ADDR_CFGCNTL, CFGCNTL_WRITE(group, reg)); in rockchip_fephy_group_write()
/rk3399_rockchip-uboot/tools/patman/
H A Dcheckpatch.py96 result.errors = int(match.group(1))
97 result.warnings = int(match.group(2))
99 result.checks = int(match.group(3))
100 result.lines = int(match.group(4))
102 result.lines = int(match.group(3))
112 item['msg'] = err_match.group(1)
115 item['msg'] = warn_match.group(1)
118 item['msg'] = check_match.group(1)
121 item['file'] = file_match.group(1)
122 item['line'] = int(file_match.group(2))
H A Dpatchstream.py247 value = cover_cc_match.group(1)
265 name = series_tag_match.group(1)
266 value = series_tag_match.group(2)
281 name = commit_tag_match.group(1)
282 value = commit_tag_match.group(2)
290 self.commit = commit.Commit(commit_match.group(1))
295 if (tag_match.group(1) == 'Tested-by' and
296 tag_match.group(2).find(os.getenv('USER') + '@') != -1):
298 elif tag_match.group(1) == 'Patch-cc':
299 self.commit.AddCc(tag_match.group(2).split(','))
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H A Dcommit.py64 tag = m.group(1)
66 str = m.group(2)
H A Dsettings.py182 list = alias.get(m.group(1), [])
183 for item in m.group(2).split(','):
187 alias[m.group(1)] = list
H A Dpatman.py111 if match and match.group(1) == args[0]:
112 for cc in match.group(2).split(', '):
H A Dpatman111 if match and match.group(1) == args[0]:
112 for cc in match.group(2).split(', '):
/rk3399_rockchip-uboot/drivers/pinctrl/meson/
H A Dpinctrl-meson.c60 struct meson_pmx_group *group; in meson_pinmux_disable_other_groups() local
65 group = &priv->data->groups[i]; in meson_pinmux_disable_other_groups()
66 if (group->is_gpio || i == sel_group) in meson_pinmux_disable_other_groups()
69 for (j = 0; j < group->num_pins; j++) { in meson_pinmux_disable_other_groups()
70 if (group->pins[j] == pin) { in meson_pinmux_disable_other_groups()
72 debug("pinmux: disabling %s\n", group->name); in meson_pinmux_disable_other_groups()
73 addr = priv->reg_mux + group->reg * 4; in meson_pinmux_disable_other_groups()
74 writel(readl(addr) & ~BIT(group->bit), addr); in meson_pinmux_disable_other_groups()
85 const struct meson_pmx_group *group; in meson_pinmux_group_set() local
90 group = &priv->data->groups[group_selector]; in meson_pinmux_group_set()
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/rk3399_rockchip-uboot/arch/sandbox/
H A Dconfig.mk20 -Wl,--start-group $(u-boot-main) -Wl,--end-group \
24 -Wl,--start-group $(patsubst $(obj)/%,%,$(u-boot-spl-main)) \
25 $(patsubst $(obj)/%,%,$(u-boot-spl-platdata)) -Wl,--end-group \
/rk3399_rockchip-uboot/drivers/gpio/
H A Dsunxi_gpio.c102 int group = 0; in sunxi_name_to_gpio() local
110 group = *name - (*name > 'a' ? 'a' : 'A'); in sunxi_name_to_gpio()
118 if (pin < 0 || pin > groupsize || group >= 9) in sunxi_name_to_gpio()
120 return group * 32 + pin; in sunxi_name_to_gpio()
126 int group = 0; in sunxi_name_to_gpio_bank() local
131 group = *name - (*name > 'a' ? 'a' : 'A'); in sunxi_name_to_gpio_bank()
132 return group; in sunxi_name_to_gpio_bank()
/rk3399_rockchip-uboot/arch/arm/mach-imx/
H A Diomux-v3.c110 void imx_iomux_set_gpr_register(int group, int start_bit, in imx_iomux_set_gpr_register() argument
115 reg = readl(base + group * 4); in imx_iomux_set_gpr_register()
122 writel(reg, base + group * 4); in imx_iomux_set_gpr_register()
/rk3399_rockchip-uboot/scripts/
H A Dmkbootimg152 a = int(match.group(1))
155 b = int(match.group(2))
157 c = int(match.group(3))
168 y = int(match.group(1)) - 2000
169 m = int(match.group(2))
/rk3399_rockchip-uboot/scripts/dtc/pylibfdt/
H A Dsetup.py57 value = m.group('value') or ''
58 key = m.group('key')
/rk3399_rockchip-uboot/board/tqc/tqma6/
H A DMAINTAINERS2 M: Markus Niebel <Markus.Niebel@tq-group.com>
H A Dclocks.cfg3 * Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com>
/rk3399_rockchip-uboot/tools/
H A Dmicrocode-tool.py67 name = m_name.group(1).lower()
70 license_text.append(m_license.group(1))
72 date = m_date.group(1)
H A Dmicrocode-tool67 name = m_name.group(1).lower()
70 license_text.append(m_license.group(1))
72 date = m_date.group(1)
H A Drkmux.py108 val, enum = int(m.group(1), 2), m.group(2)
/rk3399_rockchip-uboot/doc/device-tree-bindings/pinctrl/
H A Dpinctrl-bindings.txt167 in a pinmux group. A pinmux group consists of the pin identifier and mux
181 together in a pinmux group.
195 apply to (either this, "group" or "pinmux" has to be
197 group - the group to apply the properties to, if the driver
255 group = "foo-group";
H A Drockchip,pinctrl.txt12 The Rockchip pin configuration node is a node of a group of pins which can be
14 config of the pins in that group. The 'pins' selects the function mode(also
59 - rockchip,pins: 3 integers array, represents a group of pins mux and config
H A Dmarvell,mvebu-pinctrl.txt3 A Marvell SoC pin configuration node is a node of a group of pins which can
5 mpp pins or group of pins and a mpp function common to all pins.
/rk3399_rockchip-uboot/drivers/mtd/nand/raw/
H A Dfsmc_nand.c347 int off, len, group = 0; in fsmc_read_page_hwecc() local
363 off = fsmc_eccpl->eccplace[group].offset; in fsmc_read_page_hwecc()
364 len = fsmc_eccpl->eccplace[group].length; in fsmc_read_page_hwecc()
365 group++; in fsmc_read_page_hwecc()
/rk3399_rockchip-uboot/drivers/ddr/altera/
H A Dsequencer.c79 static void set_failing_group_stage(u32 group, u32 stage, in set_failing_group_stage() argument
89 gbl->error_group = group; in set_failing_group_stage()
1028 static void rw_mgr_mem_calibrate_write_test_issue(u32 group, in rw_mgr_mem_calibrate_write_test_issue() argument
1157 (group << 2)); in rw_mgr_mem_calibrate_write_test_issue()
1237 rw_mgr_mem_calibrate_read_test_patterns(const u32 rank_bgn, const u32 group, in rw_mgr_mem_calibrate_read_test_patterns() argument
1243 (group * rwcfg->mem_virtual_groups_per_read_dqs) << 2; in rw_mgr_mem_calibrate_read_test_patterns()
1288 writel(rwcfg->clear_dqs_enable, addr + (group << 2)); in rw_mgr_mem_calibrate_read_test_patterns()
1297 __func__, __LINE__, group, bit_chk, in rw_mgr_mem_calibrate_read_test_patterns()
1367 rw_mgr_mem_calibrate_read_test(const u32 rank_bgn, const u32 group, in rw_mgr_mem_calibrate_read_test() argument
1436 ((group * in rw_mgr_mem_calibrate_read_test()
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