xref: /rk3399_rockchip-uboot/board/tqc/tqma6/clocks.cfg (revision 5a1095a830299aef8dd32495e505e92ab1749e89)
1*cb07d74eSMarkus Niebel/*
2*cb07d74eSMarkus Niebel * Copyright (C) 2013 Boundary Devices
3*cb07d74eSMarkus Niebel * Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com>
4*cb07d74eSMarkus Niebel *
5*cb07d74eSMarkus Niebel * SPDX-License-Identifier:	GPL-2.0+
6*cb07d74eSMarkus Niebel *
7*cb07d74eSMarkus Niebel * Refer doc/README.imximage for more details about how-to configure
8*cb07d74eSMarkus Niebel * and create imximage boot image
9*cb07d74eSMarkus Niebel */
10*cb07d74eSMarkus Niebel
11*cb07d74eSMarkus Niebel/* set the default clock gate to save power */
12*cb07d74eSMarkus NiebelDATA 4, CCM_CCGR0, 0x00C03F3F
13*cb07d74eSMarkus NiebelDATA 4, CCM_CCGR1, 0x0030FC03
14*cb07d74eSMarkus NiebelDATA 4, CCM_CCGR2, 0x0FFFC000
15*cb07d74eSMarkus NiebelDATA 4, CCM_CCGR3, 0x3FF00000
16*cb07d74eSMarkus NiebelDATA 4, CCM_CCGR4, 0x00FFF300
17*cb07d74eSMarkus NiebelDATA 4, CCM_CCGR5, 0x0F0000C3
18*cb07d74eSMarkus NiebelDATA 4, CCM_CCGR6, 0x000003FF
19*cb07d74eSMarkus Niebel
20*cb07d74eSMarkus Niebel/* enable AXI cache for VDOA/VPU/IPU */
21*cb07d74eSMarkus NiebelDATA 4, MX6_IOMUXC_GPR4, 0xF00000CF
22*cb07d74eSMarkus Niebel/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
23*cb07d74eSMarkus NiebelDATA 4, MX6_IOMUXC_GPR6, 0x007F007F
24*cb07d74eSMarkus NiebelDATA 4, MX6_IOMUXC_GPR7, 0x007F007F
25