| /rk3399_rockchip-uboot/drivers/misc/ |
| H A D | rockchip-efuse.c | 139 struct rockchip_efuse_regs *efuse = in rockchip_rk1808_efuse_read() local
160 &efuse->auto_ctrl); in rockchip_rk1808_efuse_read()
162 status = readl(&efuse->int_status); in rockchip_rk1808_efuse_read()
167 out_value = readl(&efuse->dout2); in rockchip_rk1808_efuse_read()
168 writel(RK1808_INT_FINISH, &efuse->int_status); in rockchip_rk1808_efuse_read()
185 struct rockchip_efuse_regs *efuse = in rockchip_rk3368_efuse_read() local
191 sip_smc_secure_reg_write((ulong)&efuse->ctrl, in rockchip_rk3368_efuse_read()
195 res = sip_smc_secure_reg_read((ulong)&efuse->ctrl); in rockchip_rk3368_efuse_read()
196 sip_smc_secure_reg_write((ulong)&efuse->ctrl, res.a1 & in rockchip_rk3368_efuse_read()
199 res = sip_smc_secure_reg_read((ulong)&efuse->ctrl); in rockchip_rk3368_efuse_read()
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| H A D | Makefile | 56 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
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| /rk3399_rockchip-uboot/board/compulab/cl-som-am57x/ |
| H A D | spl.c | 165 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
166 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
173 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
174 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
175 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
176 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
183 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
184 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
185 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
186 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
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| /rk3399_rockchip-uboot/arch/arm/mach-mvebu/ |
| H A D | efuse.c | 69 static int do_prog_efuse(struct mvebu_hd_efuse *efuse, in do_prog_efuse() argument
74 val.dwords.d[0] = readl(&efuse->bits_31_0); in do_prog_efuse()
75 val.dwords.d[1] = readl(&efuse->bits_63_32); in do_prog_efuse()
76 val.lock = readl(&efuse->bit64); in do_prog_efuse()
85 writel(val.dwords.d[0], &efuse->bits_31_0); in do_prog_efuse()
87 writel(val.dwords.d[1], &efuse->bits_63_32); in do_prog_efuse()
89 writel(val.lock, &efuse->bit64); in do_prog_efuse()
97 struct mvebu_hd_efuse *efuse; in prog_efuse() local
104 efuse = get_efuse_line(nr); in prog_efuse()
105 if (!efuse) in prog_efuse()
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| H A D | Makefile | 30 obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
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| /rk3399_rockchip-uboot/board/ti/am57xx/ |
| H A D | board.c | 254 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
255 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
263 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
264 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
265 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
266 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
274 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
275 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
276 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
277 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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| /rk3399_rockchip-uboot/board/ti/dra7xx/ |
| H A D | evm.c | 313 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
314 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
322 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
323 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
324 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
325 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
333 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
334 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
335 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
336 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/exynos/ |
| H A D | tmu.txt | 14 - samsung,efuse-min-value : SOC efuse min value (Constant 40)
15 - efuse-value should be more than this value.
16 - samsung,efuse-value : SOC actual efuse value (Literal value)
19 - samsung,efuse-max-value : SoC max efuse value (Constant 100)
20 - efuse-value should be less than this value.
39 samsung,efuse-min-value = <40>;
40 samsung,efuse-value = <55>;
41 samsung,efuse-max-value = <100>;
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| /rk3399_rockchip-uboot/arch/arm/mach-omap2/ |
| H A D | clocks-common.c | 494 if (!v->efuse.reg[opp]) in optimize_vcore_voltage()
497 switch (v->efuse.reg_bits) { in optimize_vcore_voltage()
499 val = readw(v->efuse.reg[opp]); in optimize_vcore_voltage()
502 val = readl(v->efuse.reg[opp]); in optimize_vcore_voltage()
506 v->efuse.reg[opp], v->efuse.reg_bits); in optimize_vcore_voltage()
512 v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp]); in optimize_vcore_voltage()
517 __func__, v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp], in optimize_vcore_voltage()
601 abb_setup(vcores->mpu.efuse.reg[opp], in scale_vcores()
614 abb_setup(vcores->mm.efuse.reg[opp], in scale_vcores()
627 abb_setup(vcores->gpu.efuse.reg[opp], in scale_vcores()
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| /rk3399_rockchip-uboot/arch/arm/mach-omap2/omap5/ |
| H A D | hw_data.c | 333 .mpu.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MPU_OPNO_VMIN,
334 .mpu.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
336 .core.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_CORE_OPNO_VMIN,
337 .core.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
339 .mm.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MM_OPNO_VMIN,
340 .mm.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | exynos5420-smdk5420.dts | 32 samsung,efuse-min-value = <40>;
33 samsung,efuse-value = <55>;
34 samsung,efuse-max-value = <100>;
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| H A D | keystone-k2e-netcp.dtsi | 110 reg-names = "efuse";
189 efuse-mac = <1>;
201 efuse-mac = <0>;
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| H A D | keystone-k2l-netcp.dtsi | 109 reg-names = "efuse";
172 efuse-mac = <1>;
184 efuse-mac = <0>;
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| H A D | keystone-k2hk-netcp.dtsi | 126 reg-names = "efuse";
191 efuse-mac = <1>;
203 efuse-mac = <0>;
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| H A D | keystone-k2g-netcp.dtsi | 100 reg-names = "efuse";
148 efuse-mac = <1>;
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| H A D | exynos5800-peach-pi.dts | 67 samsung,efuse-min-value = <40>;
68 samsung,efuse-value = <55>;
69 samsung,efuse-max-value = <100>;
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| H A D | exynos5250-smdk5250.dts | 82 samsung,efuse-min-value = <40>;
83 samsung,efuse-value = <55>;
84 samsung,efuse-max-value = <100>;
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| H A D | exynos5420-peach-pit.dts | 55 samsung,efuse-min-value = <40>;
56 samsung,efuse-value = <55>;
57 samsung,efuse-max-value = <100>;
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| H A D | omap36xx.dtsi | 56 /*uV ABB efuse rbb_m fbb_m vset_m*/
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| H A D | meson-gx.dtsi | 168 efuse: efuse { label
169 compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
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| H A D | exynos5250-snow.dts | 327 samsung,efuse-min-value = <40>;
328 samsung,efuse-value = <55>;
329 samsung,efuse-max-value = <100>;
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| H A D | rk3188.dtsi | 113 efuse: efuse@20010000 { label
114 compatible = "rockchip,rockchip-efuse";
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| H A D | exynos5250-spring.dts | 112 samsung,efuse-min-value = <40>;
113 samsung,efuse-value = <55>;
114 samsung,efuse-max-value = <100>;
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| H A D | rk3066a.dtsi | 146 efuse: efuse@20010000 { label
147 compatible = "rockchip,rk3066a-efuse";
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| H A D | dra7.dtsi | 1120 "int-address", "efuse-address",
1133 /*uV ABB efuse rbb_m fbb_m vset_m*/
1153 "int-address", "efuse-address",
1166 /*uV ABB efuse rbb_m fbb_m vset_m*/
1186 "int-address", "efuse-address",
1199 /*uV ABB efuse rbb_m fbb_m vset_m*/
1219 "int-address", "efuse-address",
1232 /*uV ABB efuse rbb_m fbb_m vset_m*/
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