| /rk3399_rockchip-uboot/arch/arm/include/asm/mach-imx/ |
| H A D | rdc-sema.h | 41 #define RDC_PDAP_DW_SHIFT(domain) ((domain) << 1) argument 42 #define RDC_PDAP_DR_SHIFT(domain) (1 + RDC_PDAP_DW_SHIFT(domain)) argument 43 #define RDC_PDAP_DW_MASK(domain) (1 << RDC_PDAP_DW_SHIFT(domain)) argument 44 #define RDC_PDAP_DR_MASK(domain) (1 << RDC_PDAP_DR_SHIFT(domain)) argument 45 #define RDC_PDAP_DRW_MASK(domain) (RDC_PDAP_DW_MASK(domain) | \ argument 46 RDC_PDAP_DR_MASK(domain)) 59 #define RDC_MRC_DW_SHIFT(domain) (domain) argument 60 #define RDC_MRC_DR_SHIFT(domain) (1 + RDC_MRC_DW_SHIFT(domain)) argument 61 #define RDC_MRC_DW_MASK(domain) (1 << RDC_MRC_DW_SHIFT(domain)) argument 62 #define RDC_MRC_DR_MASK(domain) (1 << RDC_MRC_DR_SHIFT(domain)) argument [all …]
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | keystone-k2hk-clocks.dtsi | 62 reg-names = "control", "domain"; 63 domain-id = <0>; 72 reg-names = "control", "domain"; 73 domain-id = <4>; 82 reg-names = "control", "domain"; 83 domain-id = <5>; 92 reg-names = "control", "domain"; 93 domain-id = <9>; 102 reg-names = "control", "domain"; 103 domain-id = <10>; [all …]
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| H A D | keystone-k2l-clocks.dtsi | 52 reg-names = "control", "domain"; 54 domain-id = <0>; 63 reg-names = "control", "domain"; 64 domain-id = <4>; 73 reg-names = "control", "domain"; 74 domain-id = <9>; 83 reg-names = "control", "domain"; 84 domain-id = <10>; 93 reg-names = "control", "domain"; 94 domain-id = <11>; [all …]
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| H A D | keystone-clocks.dtsi | 169 reg-names = "control", "domain"; 170 domain-id = <0>; 180 reg-names = "control", "domain"; 181 domain-id = <0>; 190 reg-names = "control", "domain"; 191 domain-id = <0>; 201 reg-names = "control", "domain"; 202 domain-id = <1>; 211 reg-names = "control", "domain"; 212 domain-id = <1>; [all …]
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| H A D | keystone-k2e-clocks.dtsi | 44 reg-names = "control", "domain"; 45 domain-id = <0>; 54 reg-names = "control", "domain"; 55 domain-id = <5>; 64 reg-names = "control", "domain"; 65 domain-id = <18>; 74 reg-names = "control", "domain"; 75 domain-id = <29>;
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| H A D | zynqmp.dtsi | 76 #power-domain-cells = <0x0>; 81 #power-domain-cells = <0x0>; 86 #power-domain-cells = <0x0>; 91 #power-domain-cells = <0x0>; 96 #power-domain-cells = <0x0>; 101 #power-domain-cells = <0x0>; 106 #power-domain-cells = <0x0>; 111 #power-domain-cells = <0x0>; 116 #power-domain-cells = <0x0>; 121 #power-domain-cells = <0x0>; [all …]
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| H A D | rk3588s.dtsi | 613 #power-domain-cells = <1>; 619 power-domain@RK3588_PD_NPU { 624 power-domain@RK3588_PD_NPUTOP { 629 power-domain@RK3588_PD_NPU1 { 632 power-domain@RK3588_PD_NPU2 { 638 power-domain@RK3588_PD_GPU { 642 power-domain@RK3588_PD_VCODEC { 647 power-domain@RK3588_PD_RKVDEC0 { 650 power-domain@RK3588_PD_RKVDEC1 { 653 power-domain@RK3588_PD_VENC0 { [all …]
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| /rk3399_rockchip-uboot/arch/arm/include/asm/proc-armv/ |
| H A D | domain.h | 43 unsigned int domain = current->thread.domain; \ 44 domain &= ~domain_val(dom, DOMAIN_MANAGER); \ 45 domain |= domain_val(dom, type); \ 46 current->thread.domain = domain; \ 47 set_domain(current->thread.domain); \
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| H A D | processor.h | 41 unsigned int domain; 44 domain: domain_val(DOMAIN_USER, DOMAIN_CLIENT) | \
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| /rk3399_rockchip-uboot/drivers/power/domain/ |
| H A D | Makefile | 5 obj-$(CONFIG_POWER_DOMAIN) += power-domain-uclass.o 6 obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o 7 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain.o 8 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o 9 obj-$(CONFIG_TEGRA186_POWER_DOMAIN) += tegra186-power-domain.o
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| H A D | Kconfig | 4 bool "Enable power domain support using Driver Model" 7 Enable support for the power domain driver class. Many SoCs allow 13 bool "Enable the BCM6328 power domain driver" 20 bool "Enable the sandbox power domain test driver" 23 Enable support for a test power domain driver implementation, which 28 bool "Enable Tegra186 BPMP-based power domain driver"
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| /rk3399_rockchip-uboot/arch/arm/mach-imx/ |
| H A D | rdc-sema.c | 113 u32 domain = (p & RDC_DOMAIN_MASK) >> RDC_DOMAIN_SHIFT_BASE; in imx_rdc_setup_peri() local 116 if (domain == 0) in imx_rdc_setup_peri() 119 reg |= domain; in imx_rdc_setup_peri() 121 share_count = (domain & 0x3) in imx_rdc_setup_peri() 122 + ((domain >> 2) & 0x3) in imx_rdc_setup_peri() 123 + ((domain >> 4) & 0x3) in imx_rdc_setup_peri() 124 + ((domain >> 6) & 0x3); in imx_rdc_setup_peri() 160 u32 domain = (p & RDC_DOMAIN_MASK) >> RDC_DOMAIN_SHIFT_BASE; in imx_rdc_setup_ma() local 162 writel((domain & RDC_MDA_DID_MASK), &imx_rdc->mda[master_id]); in imx_rdc_setup_ma()
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| H A D | Kconfig | 8 bool "i.MX Resource domain controller driver" 11 i.MX Resource domain controller is used to assign masters
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| /rk3399_rockchip-uboot/drivers/power/io-domain/ |
| H A D | Makefile | 5 obj-$(CONFIG_IO_DOMAIN) += io-domain-uclass.o 6 obj-$(CONFIG_ROCKCHIP_IO_DOMAIN) += rockchip-io-domain.o
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| H A D | Kconfig | 4 bool "Enable io domain support using Driver Model" 7 Enable support for the io domain driver class. Many SoCs allow 13 bool "Enable the rockchip io domain driver"
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| /rk3399_rockchip-uboot/board/Barix/ipam390/ |
| H A D | ipam390.c | 44 void dsp_lpsc_on(unsigned domain, unsigned int id) in dsp_lpsc_on() argument 55 while (*ptstat & (0x1 << domain)) in dsp_lpsc_on() 63 *ptcmd = 0x1 << domain; in dsp_lpsc_on() 65 while (*ptstat & (0x1 << domain)) in dsp_lpsc_on()
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| /rk3399_rockchip-uboot/board/davinci/da8xxevm/ |
| H A D | omapl138_lcdk.c | 261 void dsp_lpsc_on(unsigned domain, unsigned int id) in dsp_lpsc_on() argument 272 while (*ptstat & (0x1 << domain)) in dsp_lpsc_on() 280 *ptcmd = 0x1 << domain; in dsp_lpsc_on() 282 while (*ptstat & (0x1 << domain)) in dsp_lpsc_on()
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| H A D | da850evm.c | 73 void dsp_lpsc_on(unsigned domain, unsigned int id) in dsp_lpsc_on() argument 84 while (*ptstat & (0x1 << domain)) in dsp_lpsc_on() 92 *ptcmd = 0x1 << domain; in dsp_lpsc_on() 94 while (*ptstat & (0x1 << domain)) in dsp_lpsc_on()
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| /rk3399_rockchip-uboot/arch/mips/dts/ |
| H A D | brcm,bcm6328.dtsi | 9 #include <dt-bindings/power-domain/bcm6328-power-domain.h> 127 compatible = "brcm,bcm6328-power-domain"; 129 #power-domain-cells = <1>;
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| H A D | brcm,bcm63268.dtsi | 9 #include <dt-bindings/power-domain/bcm63268-power-domain.h> 134 compatible = "brcm,bcm6328-power-domain"; 136 #power-domain-cells = <1>;
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| /rk3399_rockchip-uboot/lib/lzma/ |
| H A D | license.txt | 3 LZMA SDK is placed in the public domain.
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| /rk3399_rockchip-uboot/arch/arm/mach-omap2/omap5/ |
| H A D | Kconfig | 67 domain on DRA7xx & AM57xx SoCs. 81 domain on DRA7xx & AM57xx SoCs. 105 domain on DRA7xx & AM57xx SoCs. 129 domain on DRA7xx & AM57xx SoCs.
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| /rk3399_rockchip-uboot/arch/arm/mach-davinci/include/mach/ |
| H A D | da850_lowlevel.h | 30 unsigned char domain, unsigned char state);
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| /rk3399_rockchip-uboot/lib/dhry/ |
| H A D | Kconfig | 4 Dhrystone is an old benchmark in the public domain that gives a
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.dns | 6 information with domain names assigned to each of the participants. Most 7 importantly, it translates domain names meaningful to humans into the numerical
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