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Searched refs:dma (Results 1 – 25 of 167) sorted by relevance

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/rk3399_rockchip-uboot/drivers/net/
H A Dbcm-sf2-eth-gmac.c35 static int gmac_disable_dma(struct eth_dma *dma, int dir);
36 static int gmac_enable_dma(struct eth_dma *dma, int dir);
95 static void dma_tx_dump(struct eth_dma *dma) in dma_tx_dump() argument
112 descp = (dma64dd_t *)(dma->tx_desc_aligned) + i; in dma_tx_dump()
121 bufp = (uint8_t *)(dma->tx_buf + i * TX_BUF_SIZE_ALIGNED); in dma_tx_dump()
127 static void dma_rx_dump(struct eth_dma *dma) in dma_rx_dump() argument
144 descp = (dma64dd_t *)(dma->rx_desc_aligned) + i; in dma_rx_dump()
152 bufp = dma->rx_buf + i * RX_BUF_SIZE_ALIGNED; in dma_rx_dump()
159 static int dma_tx_init(struct eth_dma *dma) in dma_tx_init() argument
169 memset((void *)(dma->tx_desc_aligned), 0, in dma_tx_init()
[all …]
H A Dbcm-sf2-eth.c36 struct eth_dma *dma = &(eth->dma); in bcm_sf2_eth_init() local
48 dma->disable_dma(dma, MAC_DMA_RX); in bcm_sf2_eth_init()
49 dma->disable_dma(dma, MAC_DMA_TX); in bcm_sf2_eth_init()
74 struct eth_dma *dma = &(((struct eth_info *)(dev->priv))->dma); in bcm_sf2_eth_send() local
82 rc = dma->tx_packet(dma, buf, length); in bcm_sf2_eth_send()
88 while (!(dma->check_tx_done(dma))) { in bcm_sf2_eth_send()
105 struct eth_dma *dma = &(((struct eth_info *)(dev->priv))->dma); in bcm_sf2_eth_receive() local
113 rcvlen = dma->check_rx_done(dma, buf); in bcm_sf2_eth_receive()
152 struct eth_dma *dma = &(eth->dma); in bcm_sf2_eth_open() local
160 dma->enable_dma(dma, MAC_DMA_RX); in bcm_sf2_eth_open()
[all …]
H A Dbcm-sf2-eth.h38 int (*tx_packet)(struct eth_dma *dma, void *packet, int length);
39 bool (*check_tx_done)(struct eth_dma *dma);
41 int (*check_rx_done)(struct eth_dma *dma, uint8_t *buf);
43 int (*enable_dma)(struct eth_dma *dma, int dir);
44 int (*disable_dma)(struct eth_dma *dma, int dir);
48 struct eth_dma dma; member
/rk3399_rockchip-uboot/drivers/dma/
H A Dlpc32xx_dma.c56 static struct dma_reg *dma = (struct dma_reg *)DMA_BASE; variable
72 writel(0, &dma->config); in lpc32xx_dma_get_channel()
73 writel(0, &dma->sync); in lpc32xx_dma_get_channel()
76 writel(0xFF, &dma->int_tc_clear); in lpc32xx_dma_get_channel()
77 writel(0xFF, &dma->raw_tc_stat); in lpc32xx_dma_get_channel()
78 writel(0xFF, &dma->int_err_clear); in lpc32xx_dma_get_channel()
79 writel(0xFF, &dma->raw_err_stat); in lpc32xx_dma_get_channel()
82 writel(DMAC_CTRL_ENABLE, &dma->config); in lpc32xx_dma_get_channel()
102 writel(BIT_MASK(channel), &dma->int_tc_clear); in lpc32xx_dma_start_xfer()
103 writel(BIT_MASK(channel), &dma->int_err_clear); in lpc32xx_dma_start_xfer()
[all …]
H A Dfsl_dma.c65 volatile fsl_dma_t *dma = &dma_base->dma[0]; in dma_check() local
70 status = in_dma32(&dma->sr); in dma_check()
74 out_dma32(&dma->mr, in_dma32(&dma->mr) & ~FSL_DMA_MR_CS); in dma_check()
85 volatile fsl_dma_t *dma = &dma_base->dma[0]; in dma_init() local
87 out_dma32(&dma->satr, FSL_DMA_SATR_SREAD_SNOOP); in dma_init()
88 out_dma32(&dma->datr, FSL_DMA_DATR_DWRITE_SNOOP); in dma_init()
89 out_dma32(&dma->sr, 0xffffffff); /* clear any errors */ in dma_init()
95 volatile fsl_dma_t *dma = &dma_base->dma[0]; in dmacpy() local
101 out_dma32(&dma->dar, (u32) (dest & 0xFFFFFFFF)); in dmacpy()
102 out_dma32(&dma->sar, (u32) (src & 0xFFFFFFFF)); in dmacpy()
[all …]
/rk3399_rockchip-uboot/drivers/usb/musb-new/
H A Dmusb_gadget.c85 struct dma_controller *dma = musb->dma_controller; in map_dma_buffer() local
89 if (!is_dma_capable() || !musb_ep->dma) in map_dma_buffer()
96 if (dma->is_compatible) in map_dma_buffer()
97 compatible = dma->is_compatible(musb_ep->dma, in map_dma_buffer()
103 if (request->request.dma == DMA_ADDR_INVALID) { in map_dma_buffer()
104 request->request.dma = dma_map_single( in map_dma_buffer()
114 request->request.dma, in map_dma_buffer()
130 if (request->request.dma == DMA_ADDR_INVALID) { in unmap_dma_buffer()
137 request->request.dma, in unmap_dma_buffer()
142 request->request.dma = DMA_ADDR_INVALID; in unmap_dma_buffer()
[all …]
H A Dmusb_host.c373 struct dma_controller *dma = musb->dma_controller; in musb_advance_schedule() local
378 dma->channel_release(ep->rx_channel); in musb_advance_schedule()
384 dma->channel_release(ep->tx_channel); in musb_advance_schedule()
617 static bool musb_tx_dma_program(struct dma_controller *dma, in musb_tx_dma_program() argument
666 if (!dma->channel_program(channel, pkt_size, mode, in musb_tx_dma_program()
668 dma->channel_release(channel); in musb_tx_dma_program()
1116 struct dma_channel *dma; in musb_host_tx() local
1129 dma = is_dma_capable() ? hw_ep->tx_channel : NULL; in musb_host_tx()
1131 dma ? ", dma" : ""); in musb_host_tx()
1166 if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) { in musb_host_tx()
[all …]
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dzynqmp.dtsi328 fpd_dma_chan1: dma@fd500000 {
330 compatible = "xlnx,zynqmp-dma-1.0";
341 fpd_dma_chan2: dma@fd510000 {
343 compatible = "xlnx,zynqmp-dma-1.0";
354 fpd_dma_chan3: dma@fd520000 {
356 compatible = "xlnx,zynqmp-dma-1.0";
367 fpd_dma_chan4: dma@fd530000 {
369 compatible = "xlnx,zynqmp-dma-1.0";
380 fpd_dma_chan5: dma@fd540000 {
382 compatible = "xlnx,zynqmp-dma-1.0";
[all …]
H A Dr8a7795.dtsi426 dmac0: dma-controller@e6700000 {
456 #dma-cells = <1>;
457 dma-channels = <16>;
460 dmac1: dma-controller@e7300000 {
490 #dma-cells = <1>;
491 dma-channels = <16>;
494 dmac2: dma-controller@e7310000 {
524 #dma-cells = <1>;
525 dma-channels = <16>;
528 audma0: dma-controller@ec700000 {
[all …]
H A Domap3.dtsi163 dma-names = "tx", "rx";
206 sdma: dma-controller@48056000 {
213 #dma-cells = <1>;
214 dma-channels = <32>;
215 dma-requests = <96>;
291 dma-names = "tx", "rx";
301 dma-names = "tx", "rx";
311 dma-names = "tx", "rx";
321 dma-names = "tx", "rx";
332 dma-names = "tx", "rx";
[all …]
H A Dbcm283x.dtsi38 dma: dma@7e007000 { label
39 compatible = "brcm,bcm2835-dma";
52 /* dma channel 11-14 share one irq */
74 "dma-shared-all";
75 #dma-cells = <1>;
76 brcm,dma-channel-mask = <0x7f35>;
152 dmas = <&dma 2>,
153 <&dma 3>;
154 dma-names = "tx", "rx";
H A Dsun6i-a31.dtsi462 dma: dma-controller@01c02000 { label
463 compatible = "allwinner,sun6i-a31-dma";
468 #dma-cells = <1>;
825 dmas = <&dma 6>, <&dma 6>;
826 dma-names = "rx", "tx";
838 dmas = <&dma 7>, <&dma 7>;
839 dma-names = "rx", "tx";
851 dmas = <&dma 8>, <&dma 8>;
852 dma-names = "rx", "tx";
864 dmas = <&dma 9>, <&dma 9>;
[all …]
H A Ddm816x.dtsi144 #dma-cells = <1>;
186 dma-names = "rxtx";
203 dma-names = "tx", "rx";
214 dma-names = "tx", "rx";
308 dma-names = "tx0", "rx0", "tx1", "rx1",
318 dma-names = "tx", "rx";
382 dma-names = "tx", "rx";
392 dma-names = "tx", "rx";
402 dma-names = "tx", "rx";
445 dma-names =
[all …]
H A Dr8a7796.dtsi384 dma-names = "tx", "rx", "tx", "rx";
401 dma-names = "tx", "rx", "tx", "rx";
418 dma-names = "tx", "rx", "tx", "rx";
434 dma-names = "tx", "rx";
450 dma-names = "tx", "rx";
466 dma-names = "tx", "rx";
482 dma-names = "tx", "rx";
601 dma-names = "tx", "rx", "tx", "rx";
619 dma-names = "tx", "rx", "tx", "rx";
637 dma-names = "tx", "rx", "tx", "rx";
[all …]
H A Dsun8i-a23-a33.dtsi259 dma: dma-controller@01c02000 { label
260 compatible = "allwinner,sun8i-a23-dma";
265 #dma-cells = <1>;
477 dmas = <&dma 6>, <&dma 6>;
478 dma-names = "rx", "tx";
490 dmas = <&dma 7>, <&dma 7>;
491 dma-names = "rx", "tx";
503 dmas = <&dma 8>, <&dma 8>;
504 dma-names = "rx", "tx";
516 dmas = <&dma 9>, <&dma 9>;
[all …]
H A Dat91sam9n12.dtsi11 #include <dt-bindings/dma/at91.h>
431 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
432 dma-names = "rxtx";
484 dma: dma-controller@ffffec00 { label
485 compatible = "atmel,at91sam9g45-dma";
488 #dma-cells = <2>;
866 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
867 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
868 dma-names = "tx", "rx";
924 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
[all …]
H A Dtegra20.dtsi203 apbdma: dma@6000a000 {
224 reset-names = "dma";
225 #dma-cells = <1>;
279 dma-names = "rx", "tx";
291 dma-names = "rx", "tx";
303 dma-names = "rx", "tx";
323 dma-names = "rx", "tx";
336 dma-names = "rx", "tx";
349 dma-names = "rx", "tx";
362 dma-names = "rx", "tx";
[all …]
H A Dsun8i-h3.dtsi152 dma: dma-controller@01c02000 { label
153 compatible = "allwinner,sun8i-h3-dma";
158 #dma-cells = <1>;
423 dmas = <&dma 6>, <&dma 6>;
424 dma-names = "rx", "tx";
436 dmas = <&dma 7>, <&dma 7>;
437 dma-names = "rx", "tx";
449 dmas = <&dma 8>, <&dma 8>;
450 dma-names = "rx", "tx";
462 dmas = <&dma 9>, <&dma 9>;
[all …]
H A Dimx6ull.dtsi177 dma_apbh: dma-apbh@01804000 {
178 compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
185 #dma-cells = <1>;
186 dma-channels = <4>;
206 dma-names = "rx-tx";
230 dma-names = "rx", "tx";
242 "rxtx7", "dma";
256 dma-names = "rx", "tx";
270 dma-names = "rx", "tx";
284 dma-names = "rx", "tx";
[all …]
H A Dtegra114.dtsi176 apbdma: dma@6000a000 {
213 reset-names = "dma";
214 #dma-cells = <1>;
271 dma-names = "rx", "tx";
284 dma-names = "rx", "tx";
297 dma-names = "rx", "tx";
310 dma-names = "rx", "tx";
335 dma-names = "rx", "tx";
350 dma-names = "rx", "tx";
365 dma-names = "rx", "tx";
[all …]
H A Dat91sam9x5.dtsi13 #include <dt-bindings/dma/at91.h>
444 dma0: dma-controller@ffffec00 {
445 compatible = "atmel,at91sam9g45-dma";
448 #dma-cells = <2>;
453 dma1: dma-controller@ffffee00 {
454 compatible = "atmel,at91sam9g45-dma";
457 #dma-cells = <2>;
891 dma-names = "tx", "rx";
904 dma-names = "rxtx";
918 dma-names = "rxtx";
[all …]
H A Ddra7.dtsi190 sdma_xbar: dma-router@b78 {
191 compatible = "ti,dra7-dma-crossbar";
193 #dma-cells = <1>;
194 dma-requests = <205>;
195 ti,dma-safe-map = <0>;
196 dma-masters = <&sdma>;
199 edma_xbar: dma-router@c78 {
200 compatible = "ti,dra7-dma-crossbar";
202 #dma-cells = <2>;
203 dma-requests = <204>;
[all …]
/rk3399_rockchip-uboot/drivers/misc/
H A Dqfw.c241 struct fw_cfg_dma_access dma; in qemu_fwcfg_read_entry_dma() local
243 dma.length = cpu_to_be32(size); in qemu_fwcfg_read_entry_dma()
244 dma.address = cpu_to_be64((uintptr_t)address); in qemu_fwcfg_read_entry_dma()
245 dma.control = cpu_to_be32(FW_CFG_DMA_READ); in qemu_fwcfg_read_entry_dma()
252 dma.control |= cpu_to_be32(FW_CFG_DMA_SELECT | (entry << 16)); in qemu_fwcfg_read_entry_dma()
257 entry, size, address, be32_to_cpu(dma.control)); in qemu_fwcfg_read_entry_dma()
259 fwcfg_arch_ops->arch_read_dma(&dma); in qemu_fwcfg_read_entry_dma()
/rk3399_rockchip-uboot/arch/arm/mach-at91/include/mach/
H A Datmel_usba_udc.h13 #define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ argument
19 .can_dma = dma, \
/rk3399_rockchip-uboot/arch/x86/cpu/qemu/
H A Dqemu.c47 static void qemu_x86_fwcfg_read_entry_dma(struct fw_cfg_dma_access *dma) in qemu_x86_fwcfg_read_entry_dma() argument
50 outl(cpu_to_be32((uintptr_t)dma), FW_DMA_PORT_HIGH); in qemu_x86_fwcfg_read_entry_dma()
52 while (be32_to_cpu(dma->control) & ~FW_CFG_DMA_ERROR) in qemu_x86_fwcfg_read_entry_dma()

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