| /rk3399_rockchip-uboot/drivers/i2c/ |
| H A D | i2c-gpio.c | 60 int delay, uchar bit) in i2c_gpio_write_bit() argument
63 udelay(delay); in i2c_gpio_write_bit()
65 udelay(delay); in i2c_gpio_write_bit()
67 udelay(2 * delay); in i2c_gpio_write_bit()
71 int delay) in i2c_gpio_read_bit() argument
76 udelay(delay); in i2c_gpio_read_bit()
78 udelay(delay); in i2c_gpio_read_bit()
80 udelay(2 * delay); in i2c_gpio_read_bit()
87 int delay) in i2c_gpio_send_start() argument
89 udelay(delay); in i2c_gpio_send_start()
[all …]
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| /rk3399_rockchip-uboot/drivers/net/phy/ |
| H A D | miiphybb.c | 101 .delay = bb_delay_wrap,
122 BB_MII_RELOCATE(bb_miiphy_buses[i].delay, gd->reloc_off); in bb_miiphy_init()
170 bus->delay(bus); in miiphy_pre()
172 bus->delay(bus); in miiphy_pre()
178 bus->delay(bus); in miiphy_pre()
180 bus->delay(bus); in miiphy_pre()
183 bus->delay(bus); in miiphy_pre()
185 bus->delay(bus); in miiphy_pre()
188 bus->delay(bus); in miiphy_pre()
190 bus->delay(bus); in miiphy_pre()
[all …]
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/video/ |
| H A D | intel-gma.txt | 15 - intel,panel-power-cycle-delay : T4 time sequence (6 = 500ms)
18 - intel,panel-power-up-delay : T1+T2 time sequence
19 - intel,panel-power-down-delay : T3 time sequence
20 - intel,panel-power-backlight-on-delay : T5 time sequence
21 - intel,panel-power-backlight-off-delay : Tx time sequence
33 intel,panel-power-cycle-delay = <6>;
34 intel,panel-power-up-delay = <2000>;
35 intel,panel-power-down-delay = <500>;
36 intel,panel-power-backlight-on-delay = <2000>;
37 intel,panel-power-backlight-off-delay = <2000>;
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| H A D | tegra20-dc.txt | 27 * delay before asserting panel_vdd
28 * delay between panel_vdd-rise and data-rise
29 * delay between data-rise and backlight_vdd-rise
30 * delay between backlight_vdd and pwm-rise
31 * delay between pwm-rise and backlight_en-rise
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| /rk3399_rockchip-uboot/drivers/video/drm/rk628/ |
| H A D | panel.c | 194 panel->delay.prepare = dev_read_u32_default(dev, "panel-prepare-delay-ms", 0); in rk628_panel_info_get()
195 panel->delay.enable = dev_read_u32_default(dev, "panel-enable-delay-ms", 0); in rk628_panel_info_get()
196 panel->delay.disable = dev_read_u32_default(dev, "panel-disable-delay-ms", 0); in rk628_panel_info_get()
197 panel->delay.unprepare = dev_read_u32_default(dev, "panel-unprepare-delay-ms", 0); in rk628_panel_info_get()
198 panel->delay.reset = dev_read_u32_default(dev, "panel-reset-delay-ms", 0); in rk628_panel_info_get()
199 panel->delay.init = dev_read_u32_default(dev, "panel-init-delay-ms", 0); in rk628_panel_info_get()
227 if (p->delay.prepare) in rk628_panel_prepare()
228 mdelay(p->delay.prepare); in rk628_panel_prepare()
233 if (p->delay.reset) in rk628_panel_prepare()
234 mdelay(p->delay.reset); in rk628_panel_prepare()
[all …]
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| /rk3399_rockchip-uboot/cmd/ |
| H A D | bootmenu.c | 35 int delay; /* delay for autoboot */ member
86 if (menu->delay > 0) { in bootmenu_autoboot_loop()
88 printf(" Hit any key to stop autoboot: %2d ", menu->delay); in bootmenu_autoboot_loop()
91 while (menu->delay > 0) { in bootmenu_autoboot_loop()
99 menu->delay = -1; in bootmenu_autoboot_loop()
118 if (menu->delay < 0) in bootmenu_autoboot_loop()
121 --menu->delay; in bootmenu_autoboot_loop()
122 printf("\b\b\b%2d ", menu->delay); in bootmenu_autoboot_loop()
128 if (menu->delay == 0) in bootmenu_autoboot_loop()
199 if (menu->delay >= 0) { in bootmenu_choice_entry()
[all …]
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| H A D | misc.c | 19 ulong delay; in do_sleep() local
25 delay = simple_strtoul(argv[1], NULL, 10) * CONFIG_SYS_HZ; in do_sleep()
41 delay += mdelay; in do_sleep()
43 while (get_timer(start) < delay) { in do_sleep()
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| /rk3399_rockchip-uboot/board/topic/zynq/ |
| H A D | ps7_init_common.c | 41 static int get_number_of_cycles_for_delay(unsigned int delay) in get_number_of_cycles_for_delay() argument
43 return (APU_FREQ / (2 * 1000)) * delay; in get_number_of_cycles_for_delay()
75 int delay; in ps7_config() local
105 delay = get_number_of_cycles_for_delay(mask); in ps7_config()
107 while (ioread(addr) < delay) in ps7_config()
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | rk3288-thermal.dtsi | 12 polling-delay-passive = <1000>; /* milliseconds */
13 polling-delay = <5000>; /* milliseconds */
21 polling-delay-passive = <100>; /* milliseconds */
22 polling-delay = <5000>; /* milliseconds */
61 polling-delay-passive = <100>; /* milliseconds */
62 polling-delay = <5000>; /* milliseconds */
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| H A D | dra72-evm-revc.dts | 67 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
68 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
75 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
76 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
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| H A D | socfpga_cyclone5_vining_fpga.dts | 82 read-delay = <4>; /* delay value in read data capture register */
99 read-delay = <4>; /* delay value in read data capture register */
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| /rk3399_rockchip-uboot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 92 u32 delay, phase, pup, cs; in ddr3_read_leveling_hw() local
111 delay = reg & PUP_DELAY_MASK; in ddr3_read_leveling_hw()
117 dram_info->rl_val[cs][pup][D] = delay; in ddr3_read_leveling_hw()
182 u32 reg, cs, ecc, pup_num, phase, delay, pup; in ddr3_read_leveling_sw() local
292 delay = dram_info->rl_val[cs][pup][D]; in ddr3_read_leveling_sw()
294 delay); in ddr3_read_leveling_sw()
338 int *counter_in_progress, int final_delay, u32 delay, in overrun() argument
359 info->rl_val[cs][idx][DS] = delay; in overrun()
404 u32 reg, delay, phase, pup, rd_sample_delay, add, locked_pups, in ddr3_read_leveling_single_cs_rl_mode() local
414 delay = 0; in ddr3_read_leveling_single_cs_rl_mode()
[all …]
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| H A D | ddr3_write_leveling.c | 67 u32 reg, phase, delay, cs, pup; in ddr3_write_leveling_hw() local
121 delay = reg & PUP_DELAY_MASK; in ddr3_write_leveling_hw()
123 dram_info->wl_val[cs][pup][D] = delay; in ddr3_write_leveling_hw()
187 u32 cs, cnt, pup_num, sum, phase, delay, max_pup_num, pup, sdram_offset; in ddr3_wl_supplement() local
353 delay = in ddr3_wl_supplement()
362 phase, delay); in ddr3_wl_supplement()
369 delay = in ddr3_wl_supplement()
376 && (delay <= in ddr3_wl_supplement()
382 delay = 0x0; in ddr3_wl_supplement()
388 [D] = delay; in ddr3_wl_supplement()
[all …]
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| /rk3399_rockchip-uboot/test/rockchip/ |
| H A D | test-misc.c | 68 ulong delay = 100, delta; in timer_delay_test() local
74 udelay(delay); in timer_delay_test()
76 printf(" Set %4luus, real %4luus\n", delay, delta); in timer_delay_test()
79 mdelay(delay); in timer_delay_test()
81 printf(" Set %4lums, real %4lums\n", delay, delta); in timer_delay_test()
84 mdelay(delay * 10UL); in timer_delay_test()
86 printf(" Set %4lums, real %4lums\n\n", delay * 10UL, delta); in timer_delay_test()
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| /rk3399_rockchip-uboot/drivers/video/drm/ |
| H A D | rockchip_panel.c | 57 } delay; member
311 if (plat->delay.prepare) in panel_simple_prepare()
312 mdelay(plat->delay.prepare); in panel_simple_prepare()
317 if (plat->delay.reset) in panel_simple_prepare()
318 mdelay(plat->delay.reset); in panel_simple_prepare()
323 if (plat->delay.init) in panel_simple_prepare()
324 mdelay(plat->delay.init); in panel_simple_prepare()
374 if (plat->delay.unprepare) in panel_simple_unprepare()
375 mdelay(plat->delay.unprepare); in panel_simple_unprepare()
388 if (plat->delay.enable) in panel_simple_enable()
[all …]
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| H A D | rockchip_rgb.c | 99 u8 delay; member
129 } delay; member
311 if (desc->header.delay) in rockchip_mcu_panel_send_cmds()
312 mdelay(desc->header.delay); in rockchip_mcu_panel_send_cmds()
330 if (mcu_panel->desc->delay.prepare) in rockchip_mcu_panel_prepare()
331 mdelay(mcu_panel->desc->delay.prepare); in rockchip_mcu_panel_prepare()
336 if (mcu_panel->desc->delay.reset) in rockchip_mcu_panel_prepare()
337 mdelay(mcu_panel->desc->delay.reset); in rockchip_mcu_panel_prepare()
342 if (mcu_panel->desc->delay.init) in rockchip_mcu_panel_prepare()
343 mdelay(mcu_panel->desc->delay.init); in rockchip_mcu_panel_prepare()
[all …]
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/net/ |
| H A D | ti,dp83867.txt | 5 - ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
7 - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
19 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
20 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;
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| /rk3399_rockchip-uboot/board/renesas/ap325rxa/ |
| H A D | cpld-ap325rxa.c | 106 static int delay(void) in delay() function
130 delay(); in slave_serial()
142 delay(); in slave_serial()
153 delay(); in slave_serial()
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.bootmenu | 24 bootmenu_delay=<delay>
27 <delay> is the autoboot delay in seconds, after which the first
41 First (optional) argument of the "bootmenu" command is a delay specifier
42 and it overrides the delay value defined by "bootmenu_delay" environment
44 the argument of the "bootmenu" command is not specified, the default delay
45 will be CONFIG_BOOTDELAY. If delay is 0, no menu entries will be shown on
47 be called immediately. If delay is less then 0, bootmenu will be shown and
61 bootmenu 20 # Run bootmenu with autoboot delay 20s
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| /rk3399_rockchip-uboot/drivers/usb/host/ |
| H A D | ehci-omap.c | 130 static inline void omap_ehci_phy_reset(int on, int delay) in omap_ehci_phy_reset() argument
137 if (delay && !on) in omap_ehci_phy_reset()
138 udelay(delay); in omap_ehci_phy_reset()
154 if (delay && on) in omap_ehci_phy_reset()
155 udelay(delay); in omap_ehci_phy_reset()
158 #define omap_ehci_phy_reset(on, delay) do {} while (0) argument
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/i2c/ |
| H A D | i2c-gpio.txt | 15 * i2c-gpio,delay-us = <5>;
16 The resulting transfer speed can be adjusted by setting the delay[us]
30 i2c-gpio,delay-us = <5>;
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| /rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3562/ |
| H A D | rk3562.c | 554 u32 delay; in qos_priority_init() local
560 delay = 1000; in qos_priority_init()
563 delay--; in qos_priority_init()
564 if (delay == 0) { in qos_priority_init()
579 delay = 1000; in qos_priority_init()
583 delay--; in qos_priority_init()
584 if (delay == 0) { in qos_priority_init()
592 delay = 1000; in qos_priority_init()
596 delay--; in qos_priority_init()
597 if (delay == 0) { in qos_priority_init()
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| /rk3399_rockchip-uboot/drivers/fpga/ |
| H A D | lattice.c | 61 void ispVMDelay(unsigned short delay) in ispVMDelay() argument
63 if (delay & 0x8000) in ispVMDelay()
64 delay = (delay & ~0x8000) * 1000; in ispVMDelay()
65 udelay(delay); in ispVMDelay()
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| /rk3399_rockchip-uboot/arch/arm/mach-mvebu/serdes/a38x/ |
| H A D | seq_exec.c | 72 u32 delay; in delay_op_execute() local
75 delay = params->wait_time; in delay_op_execute()
77 printf("Delay: %d\n", delay); in delay_op_execute()
79 mdelay(delay); in delay_op_execute()
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| /rk3399_rockchip-uboot/drivers/video/sunxi/ |
| H A D | lcdc.c | 18 int delay; in lcdc_get_clk_delay() local
20 delay = mode->vfront_porch.typ + mode->vsync_len.typ + in lcdc_get_clk_delay()
23 delay /= 2; in lcdc_get_clk_delay()
25 delay -= 2; in lcdc_get_clk_delay()
27 return (delay > 30) ? 30 : delay; in lcdc_get_clk_delay()
|