92 		u32 delay, phase, pup, cs;  in ddr3_read_leveling_hw()  local
111 					delay = reg & PUP_DELAY_MASK;  in ddr3_read_leveling_hw()
117 					dram_info->rl_val[cs][pup][D] = delay;  in ddr3_read_leveling_hw()
182 	u32 reg, cs, ecc, pup_num, phase, delay, pup;  in ddr3_read_leveling_sw()  local
292 			delay = dram_info->rl_val[cs][pup][D];  in ddr3_read_leveling_sw()
294 					   delay);  in ddr3_read_leveling_sw()
338 		    int *counter_in_progress, int final_delay, u32 delay,  in overrun()  argument
359 					info->rl_val[cs][idx][DS] = delay;  in overrun()
404 	u32 reg, delay, phase, pup, rd_sample_delay, add, locked_pups,  in ddr3_read_leveling_single_cs_rl_mode()  local
414 	delay = 0;  in ddr3_read_leveling_single_cs_rl_mode()
436 		DEBUG_RL_FULL_D(delay, 2);  in ddr3_read_leveling_single_cs_rl_mode()
443 		ddr3_write_pup_reg(PUP_RL_MODE, cs, PUP_BC, phase, delay);  in ddr3_read_leveling_single_cs_rl_mode()
474 					delay, phase);  in ddr3_read_leveling_single_cs_rl_mode()
525 			if (delay < ui_max_delay) {  in ddr3_read_leveling_single_cs_rl_mode()
526 				delay++;  in ddr3_read_leveling_single_cs_rl_mode()
531 				if (delay == ui_max_delay) {  in ddr3_read_leveling_single_cs_rl_mode()
540 				delay = 0;  in ddr3_read_leveling_single_cs_rl_mode()
551 								delay = MIN_DELAY_PHASE_1_LIMIT;  in ddr3_read_leveling_single_cs_rl_mode()
562 							delay =  in ddr3_read_leveling_single_cs_rl_mode()
756 	u32 reg, delay, phase, sum, pup, rd_sample_delay, add, locked_pups,  in ddr3_read_leveling_single_cs_window_mode()  local
766 	delay = 0;  in ddr3_read_leveling_single_cs_window_mode()
790 		DEBUG_RL_FULL_D(delay, 2);  in ddr3_read_leveling_single_cs_window_mode()
797 		ddr3_write_pup_reg(PUP_RL_MODE, cs, PUP_BC, phase, delay);  in ddr3_read_leveling_single_cs_window_mode()
847 						dram_info->rl_val[cs][idx][DE] = delay;  in ddr3_read_leveling_single_cs_window_mode()
877 									delay;  in ddr3_read_leveling_single_cs_window_mode()
947 			if (delay < ui_max_delay) {  in ddr3_read_leveling_single_cs_window_mode()
949 				delay++;  in ddr3_read_leveling_single_cs_window_mode()
950 				if (delay == ui_max_delay) {  in ddr3_read_leveling_single_cs_window_mode()
964 				delay = 0;  in ddr3_read_leveling_single_cs_window_mode()