Searched refs:ddr_out32 (Results 1 – 5 of 5) sorted by relevance
| /rk3399_rockchip-uboot/drivers/ddr/fsl/ |
| H A D | fsl_ddr_gen4.c | 25 ddr_out32(ptr, value); in set_wait_for_bits_clear() 99 ddr_out32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs() 101 ddr_out32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl); in fsl_ddr_set_memctl_regs() 105 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs() 106 ddr_out32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs() 107 ddr_out32(&ddr->cs0_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 110 ddr_out32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs() 111 ddr_out32(&ddr->cs1_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs() 112 ddr_out32(&ddr->cs1_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 115 ddr_out32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs() [all …]
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| H A D | arm_ddr_gen3.c | 68 ddr_out32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs() 71 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs() 72 ddr_out32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs() 73 ddr_out32(&ddr->cs0_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 76 ddr_out32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs() 77 ddr_out32(&ddr->cs1_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs() 78 ddr_out32(&ddr->cs1_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 81 ddr_out32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs() 82 ddr_out32(&ddr->cs2_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs() 83 ddr_out32(&ddr->cs2_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() [all …]
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| H A D | util.c | 387 ddr_out32(ddrc_debug2_p[i], ddrc_debug2[i]); in fsl_ddr_sync_memctl_refresh()
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| /rk3399_rockchip-uboot/include/ |
| H A D | fsl_ddr.h | 23 #define ddr_out32(a, v) out_le32(a, v) macro 29 #define ddr_out32(a, v) out_be32(a, v) macro
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | soc.c | 299 ddr_out32(&ddr->eor, DDR_EOR_RD_REOD_DIS | DDR_EOR_WD_REOD_DIS); in erratum_a008850_early() 321 ddr_out32(&ddr->eor, tmp); in erratum_a008850_post() 412 ddr_out32(&ddr->ddr_cdr1, tmp); in ddr_enable_0v9_volt()
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