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Searched refs:cs_count (Results 1 – 8 of 8) sorted by relevance

/rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/
H A Dxor.c30 u32 reg, ui, base, cs_count; in mv_sys_xor_init() local
50 cs_count = 0; in mv_sys_xor_init()
73 reg_write(XOR_BASE_ADDR_REG(0, cs_count), base); in mv_sys_xor_init()
76 reg_write(XOR_SIZE_MASK_REG(0, cs_count), 0x7fff0000); in mv_sys_xor_init()
77 cs_count++; in mv_sys_xor_init()
H A Dddr3_init.c520 u32 cs_count = 0; in ddr3_get_cs_num_from_reg() local
525 cs_count++; in ddr3_get_cs_num_from_reg()
528 return cs_count; in ddr3_get_cs_num_from_reg()
H A Dddr3_training.c267 u32 cs_count; in calc_cs_num() local
274 cs_count = 0; in calc_cs_num()
279 cs_count++; in calc_cs_num()
283 curr_cs_num = cs_count; in calc_cs_num()
284 } else if (cs_count != curr_cs_num) { in calc_cs_num()
287 if_id, bus_cnt, cs_count, in calc_cs_num()
/rk3399_rockchip-uboot/drivers/ddr/marvell/axp/
H A Dddr3_spd.c586 __maybe_unused u32 dimm_cnt, cs_count, dimm; local
895 cs_count = 0;
899 if (dimm_info[dimm_cnt].num_of_module_ranks == cs_count) {
901 cs_count = 0;
903 cs_count++;
919 cs_count = 0;
923 if (dimm_info[dimm_cnt].num_of_module_ranks == cs_count) {
925 cs_count = 0;
927 cs_count++;
1012 cs_count = 0;
[all …]
H A Dxor.c26 u32 reg, ui, base, cs_count; in mv_sys_xor_init() local
50 cs_count = 0; in mv_sys_xor_init()
72 reg_write(XOR_BASE_ADDR_REG(0, cs_count), base); in mv_sys_xor_init()
75 reg_write(XOR_SIZE_MASK_REG(0, cs_count), 0x0FFF0000); in mv_sys_xor_init()
76 cs_count++; in mv_sys_xor_init()
H A Dddr3_dqs.c311 u32 uj, cs_count, cs_tmp, ii; in ddr3_find_adll_limits() local
333 cs_count = 0; in ddr3_find_adll_limits()
336 cs_count++; in ddr3_find_adll_limits()
338 sdram_offset = cs_count * (SDRAM_CS_SIZE + 1); in ddr3_find_adll_limits()
1330 u32 cs, cs_count, cs_tmp, victim_dq; in ddr3_load_dqs_patterns() local
1337 cs_count = 0; in ddr3_load_dqs_patterns()
1340 cs_count++; in ddr3_load_dqs_patterns()
1344 sdram_addr = (cs_count * (SDRAM_CS_SIZE + 1) + in ddr3_load_dqs_patterns()
1359 sdram_addr = (cs_count * (SDRAM_CS_SIZE + 1) + in ddr3_load_dqs_patterns()
H A Dddr3_pbs.c1533 u32 cs, cs_count, cs_tmp; in ddr3_load_pbs_patterns() local
1562 cs_count = 0; in ddr3_load_pbs_patterns()
1565 cs_count++; in ddr3_load_pbs_patterns()
1569 sdram_addr = (cs_count * (SDRAM_CS_SIZE + 1) + in ddr3_load_pbs_patterns()
1579 sdram_addr = (cs_count * (SDRAM_CS_SIZE + 1) + in ddr3_load_pbs_patterns()
H A Dddr3_init.c1074 u32 cs_count = 0; in ddr3_get_cs_num_from_reg() local
1079 cs_count++; in ddr3_get_cs_num_from_reg()
1082 return cs_count; in ddr3_get_cs_num_from_reg()