| /rk3399_rockchip-uboot/board/freescale/p2041rdb/ |
| H A D | cpld.h | 46 #define cpld ((cpld_data_t *)CPLD_BASE) macro
49 #define CPLD_SW(x) (cpld->sw[(x) - 2])
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| H A D | Makefile | 10 obj-y += cpld.o
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| H A D | README | 93 cpld reset - hard reset to default bank
94 cpld reset altbank - reset to alternate bank
95 cpld lane_mux <lane> <mux_value> - set multiplexed lane pin
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| /rk3399_rockchip-uboot/board/renesas/ap325rxa/ |
| H A D | Makefile | 11 obj-y := ap325rxa.o cpld-ap325rxa.o
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| /rk3399_rockchip-uboot/board/renesas/ulcb/ |
| H A D | Makefile | 9 obj-y := ulcb.o cpld.o ../rcar-common/common.o
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| H A D | cpld.c | 156 cpld, 4, 1, do_cpld,
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| /rk3399_rockchip-uboot/board/renesas/stout/ |
| H A D | Makefile | 11 obj-y := stout.o cpld.o qos.o ../rcar-common/common.o
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| H A D | cpld.c | 158 cpld, 4, 1, do_cpld,
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| /rk3399_rockchip-uboot/board/freescale/ls1046ardb/ |
| H A D | Makefile | 11 obj-y += cpld.o
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| H A D | cpld.c | 159 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /rk3399_rockchip-uboot/board/freescale/ls1043ardb/ |
| H A D | Makefile | 11 obj-y += cpld.o
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| H A D | cpld.c | 165 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /rk3399_rockchip-uboot/board/LaCie/net2big_v2/ |
| H A D | Makefile | 14 obj-y += ../common/cpld-gpio-bus.o
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| /rk3399_rockchip-uboot/board/freescale/t208xrdb/ |
| H A D | Makefile | 10 obj-$(CONFIG_TARGET_T2080RDB) += t208xrdb.o eth_t208xrdb.o cpld.o
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| H A D | cpld.c | 67 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| H A D | README | 158 via software: run command 'cpld reset altbank' in U-Boot.
162 via software: run command 'cpld reset' in U-Boot.
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | fsl-ls1043a-rdb.dts | 91 cpld: board-control@2,0 { label
92 compatible = "fsl,ls1043ardb-cpld";
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| /rk3399_rockchip-uboot/board/freescale/t102xrdb/ |
| H A D | Makefile | 11 obj-$(CONFIG_TARGET_T1024RDB) += cpld.o
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| H A D | cpld.c | 98 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /rk3399_rockchip-uboot/board/freescale/t104xrdb/ |
| H A D | Makefile | 11 obj-y += cpld.o
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| H A D | cpld.c | 109 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /rk3399_rockchip-uboot/board/freescale/t4rdb/ |
| H A D | Makefile | 12 obj-y += cpld.o
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| H A D | cpld.c | 122 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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| /rk3399_rockchip-uboot/board/freescale/c29xpcie/ |
| H A D | Makefile | 20 obj-y += cpld.o
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| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf5445x/ |
| H A D | speed.c | 142 u8 *cpld = (u8 *)(CONFIG_SYS_CS2_BASE + 3); in setup_5445x_clocks() local
164 bootmode = (in_8(cpld) & 0x03); in setup_5445x_clocks()
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