| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xxx/ |
| H A D | cpu.c | 101 static inline u32 init_type(u32 cluster, int init_id) in init_type() argument 104 u32 idx = (cluster >> (init_id * 8)) & TP_CLUSTER_INIT_MASK; in init_type() 117 u32 cluster, type, mask = 0; in compute_ppc_cpumask() local 121 cluster = in_be32(&gur->tp_cluster[i].lower); in compute_ppc_cpumask() 123 type = init_type(cluster, j); in compute_ppc_cpumask() 131 } while ((cluster & TP_CLUSTER_EOC) != TP_CLUSTER_EOC); in compute_ppc_cpumask() 141 u32 cluster, type, dsp_mask = 0; in compute_dsp_cpumask() local 145 cluster = in_be32(&gur->tp_cluster[i].lower); in compute_dsp_cpumask() 147 type = init_type(cluster, j); in compute_dsp_cpumask() 155 } while ((cluster & TP_CLUSTER_EOC) != TP_CLUSTER_EOC); in compute_dsp_cpumask() [all …]
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | mp.c | 43 void wake_secondary_core_n(int cluster, int core, int cluster_cores) in wake_secondary_core_n() argument 49 mpidr = ((cluster << 8) | core); in wake_secondary_core_n() 56 rst->brrl |= 1 << ((cluster * cluster_cores) + core); in wake_secondary_core_n() 73 u32 svr, ver, cluster, type; in fsl_layerscape_wake_seconday_cores() local 117 cluster = in_le32(&gur->tp_cluster[i].lower); in fsl_layerscape_wake_seconday_cores() 119 type = initiator_type(cluster, j); in fsl_layerscape_wake_seconday_cores() 126 cluster = in_le32(&gur->tp_cluster[i].lower); in fsl_layerscape_wake_seconday_cores() 128 type = initiator_type(cluster, j); in fsl_layerscape_wake_seconday_cores() 135 } while ((cluster & TP_CLUSTER_EOC) != TP_CLUSTER_EOC); in fsl_layerscape_wake_seconday_cores()
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| H A D | cpu.c | 282 u32 initiator_type(u32 cluster, int init_id) in initiator_type() argument 285 u32 idx = (cluster >> (init_id * 8)) & TP_CLUSTER_INIT_MASK; in initiator_type() 299 u32 cluster, type, mask = 0; in cpu_pos_mask() local 304 cluster = gur_in32(&gur->tp_cluster[i].lower); in cpu_pos_mask() 306 type = initiator_type(cluster, j); in cpu_pos_mask() 311 } while ((cluster & TP_CLUSTER_EOC) == 0x0); in cpu_pos_mask() 320 u32 cluster, type, mask = 0; in cpu_mask() local 325 cluster = gur_in32(&gur->tp_cluster[i].lower); in cpu_mask() 327 type = initiator_type(cluster, j); in cpu_mask() 335 } while ((cluster & TP_CLUSTER_EOC) == 0x0); in cpu_mask() [all …]
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| H A D | fsl_lsch3_speed.c | 66 uint i, cluster; in get_sys_info() local 117 cluster = fsl_qoriq_core_to_cluster(cpu); in get_sys_info() 118 c_pll_sel = (in_le32(&clk_ctrl->clkcncsr[cluster].csr) >> 27) in get_sys_info() 121 cplx_pll += cc_group[cluster] - 1; in get_sys_info()
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| H A D | fsl_lsch2_speed.c | 47 uint i, cluster; in get_sys_info() local 87 cluster = fsl_qoriq_core_to_cluster(cpu); in get_sys_info() 88 u32 c_pll_sel = (in_be32(&clk->clkcsr[cluster].clkcncsr) >> 27) in get_sys_info()
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| H A D | cpu.h | 8 u32 initiator_type(u32 cluster, int init_id);
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| H A D | Kconfig | 236 SoCs may have multiple clusters with each cluster may have multiple 288 int "Reference clock of core cluster"
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/ |
| H A D | Kconfig | 7 bool "Enable data coherency with other cores in cluster" 13 cluster, and for A57/A72, it enables receiving of instruction 124 int "Number of CPUs per cluster" 128 The number of CPUs per cluster, suppose each cluster has same number 130 A value 0 or no definition of it works for single cluster system. 131 System with multi-cluster should difine their own exact value.
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| /rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3588/ |
| H A D | rk3588.c | 1197 int cluster; in fdt_rm_cpu() local 1209 cluster = fdt_path_offset(blob, "/cpus/cpu-map/cluster0"); in fdt_rm_cpu() 1211 cluster = fdt_path_offset(blob, "/cpus/cpu-map/cluster1"); in fdt_rm_cpu() 1213 cluster = fdt_path_offset(blob, "/cpus/cpu-map/cluster2"); in fdt_rm_cpu() 1215 if (cluster < 0) in fdt_rm_cpu() 1222 cpu = fdt_subnode_offset(blob, cluster, cluster_core); in fdt_rm_cpu() 1231 cluster = fdt_path_offset(blob, "/cpus/cpu-map/cluster1"); in fdt_rm_cpu() 1234 fdt_del_node((void *)blob, cluster); in fdt_rm_cpu() 1237 cluster = fdt_path_offset(blob, "/cpus/cpu-map/cluster2"); in fdt_rm_cpu() 1240 fdt_del_node((void *)blob, cluster); in fdt_rm_cpu() [all …]
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| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cpu_init.c | 525 u32 cluster, svr = get_svr(); in enable_cluster_l2() local 536 cluster = in_be32(&gur->tp_cluster[i].lower); in enable_cluster_l2() 537 if (cluster & TP_CLUSTER_EOC) in enable_cluster_l2() 549 cluster = in_be32(&gur->tp_cluster[i].lower); in enable_cluster_l2() 553 u32 idx = (cluster >> (j*8)) & TP_CLUSTER_INIT_MASK; in enable_cluster_l2() 574 } while (!(cluster & TP_CLUSTER_EOC)); in enable_cluster_l2()
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| H A D | speed.c | 178 int cluster = fsl_qoriq_core_to_cluster(cpu); in get_sys_info() local 179 u32 c_pll_sel = (in_be32(&clk->clkcsr[cluster].clkcncsr) >> 27) in get_sys_info() 182 cplx_pll += cc_group[cluster] - 1; in get_sys_info()
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| H A D | Kconfig | 1188 SoCs may have multiple clusters with each cluster may have multiple
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.b4860qds | 18 . Four dual-thread e6500 Power Architecture processors organized in one cluster-each 47 . 2048 Kbyte unified L2 cache for each SC3900 FVP cluster 48 . 2048 Kbyte unified L2 cache for the e6500 cluster 108 1. Less e6500 cores: 1 cluster with 2 e6500 cores 109 2. Less SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster.
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/ls102xa/ |
| H A D | Kconfig | 41 SoCs may have multiple clusters with each cluster may have multiple
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| H A D | psci.S | 97 @ Affinity level 2 - Cluster: only one cluster in LS1021xa.
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | armada-ap806.dtsi | 257 clock-output-names = "ap-cpu-cluster-0", 258 "ap-cpu-cluster-1",
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| H A D | armada-375.dtsi | 399 usbcluster: usb-cluster@18400 { 400 compatible = "marvell,armada-375-usb-cluster";
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| /rk3399_rockchip-uboot/drivers/power/ |
| H A D | Kconfig | 130 On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V. 148 On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V. 149 On A83T boards dcdc3 is used for VDD-CPUB(cluster 1) and should be 0.9V.
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| /rk3399_rockchip-uboot/fs/fat/ |
| H A D | fat_write.c | 273 get_long_file_name(fsdata *mydata, int curclust, __u8 *cluster, in get_long_file_name() argument 279 __u8 *buflimit = cluster + mydata->sect_size * ((curclust == 0) ? in get_long_file_name()
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/ |
| H A D | psci.S | 181 @ Requires dense and single-cluster CPU ID space
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3399.c | 511 enum cpu_cluster cluster) in rk3399_configure_cpu() argument 519 switch (cluster) { in rk3399_configure_cpu()
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| /rk3399_rockchip-uboot/arch/arm/mach-rockchip/ |
| H A D | Kconfig | 307 into a big and little cluster with 4 cores each) Cortex-A53 including 308 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 309 (for the little cluster), PowerVR G6110 based graphics, one video
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