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Searched refs:clk_ctrl (Results 1 – 6 of 6) sorted by relevance

/rk3399_rockchip-uboot/drivers/clk/
H A Dclk_zynq.c102 static enum zynq_clk zynq_clk_get_cpu_pll(u32 clk_ctrl) in zynq_clk_get_cpu_pll() argument
104 u32 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >> CLK_CTRL_SRCSEL_SHIFT; in zynq_clk_get_cpu_pll()
117 static enum zynq_clk zynq_clk_get_peripheral_pll(u32 clk_ctrl) in zynq_clk_get_peripheral_pll() argument
119 u32 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >> CLK_CTRL_SRCSEL_SHIFT; in zynq_clk_get_peripheral_pll()
134 u32 clk_ctrl, reset, pwrdwn, mul, bypass; in zynq_clk_get_pll_rate() local
136 clk_ctrl = readl(zynq_clk_get_register(id)); in zynq_clk_get_pll_rate()
138 reset = (clk_ctrl & PLLCTRL_RESET_MASK) >> PLLCTRL_RESET_SHIFT; in zynq_clk_get_pll_rate()
139 pwrdwn = (clk_ctrl & PLLCTRL_PWRDWN_MASK) >> PLLCTRL_PWRDWN_SHIFT; in zynq_clk_get_pll_rate()
143 bypass = clk_ctrl & PLLCTRL_BPFORCE_MASK; in zynq_clk_get_pll_rate()
147 mul = (clk_ctrl & PLLCTRL_FBDIV_MASK) >> PLLCTRL_FBDIV_SHIFT; in zynq_clk_get_pll_rate()
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H A Dclk_zynqmp.c235 static enum zynqmp_clk zynqmp_clk_get_cpu_pll(u32 clk_ctrl) in zynqmp_clk_get_cpu_pll() argument
237 u32 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >> in zynqmp_clk_get_cpu_pll()
251 static enum zynqmp_clk zynqmp_clk_get_ddr_pll(u32 clk_ctrl) in zynqmp_clk_get_ddr_pll() argument
253 u32 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >> in zynqmp_clk_get_ddr_pll()
265 static enum zynqmp_clk zynqmp_clk_get_peripheral_pll(u32 clk_ctrl) in zynqmp_clk_get_peripheral_pll() argument
267 u32 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >> in zynqmp_clk_get_peripheral_pll()
281 static ulong zynqmp_clk_get_pll_src(ulong clk_ctrl, in zynqmp_clk_get_pll_src() argument
288 src_sel = (clk_ctrl & PLLCTRL_POST_SRC_MASK) >> in zynqmp_clk_get_pll_src()
291 src_sel = (clk_ctrl & PLLCTRL_POST_SRC_MASK) >> in zynqmp_clk_get_pll_src()
312 u32 clk_ctrl, reset, mul; in zynqmp_clk_get_pll_rate() local
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/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dfsl_lsch3_speed.c33 struct ccsr_clk_ctrl __iomem *clk_ctrl = in get_sys_info() local
118 c_pll_sel = (in_le32(&clk_ctrl->clkcncsr[cluster].csr) >> 27) in get_sys_info()
/rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/armada100/
H A Dtimer.c19 u32 clk_ctrl; /* Timer clk control reg */ member
112 writel(0x0, &armd1timers->clk_ctrl); in timer_init()
/rk3399_rockchip-uboot/drivers/spi/
H A Dti_qspi.c85 u32 clk_ctrl; member
133 writel(readl(&priv->base->clk_ctrl) & ~QSPI_CLK_EN, in ti_spi_set_speed()
134 &priv->base->clk_ctrl); in ti_spi_set_speed()
136 writel(QSPI_CLK_EN | clk_div, &priv->base->clk_ctrl); in ti_spi_set_speed()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dgrf_rk3576.h334 uint32_t clk_ctrl; /* address offset: 0x0000 */ member