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Searched refs:bit1 (Results 1 – 22 of 22) sorted by relevance

/rk3399_rockchip-uboot/tools/
H A Dvybridimage.c44 uint8_t bit1 = (byte & (1 << 1)) ? 1 : 0; in vybridimage_sw_ecc() local
54 res |= ((bit7 ^ bit5 ^ bit4 ^ bit2 ^ bit1) << 1); in vybridimage_sw_ecc()
55 res |= ((bit7 ^ bit6 ^ bit5 ^ bit1 ^ bit0) << 2); in vybridimage_sw_ecc()
57 res |= ((bit6 ^ bit4 ^ bit3 ^ bit2 ^ bit1 ^ bit0) << 4); in vybridimage_sw_ecc()
/rk3399_rockchip-uboot/board/Seagate/nas220/
H A Dkwbimage.cfg65 # bit1-0: 00, Cs0width=x8
100 # bit1: 0, DDR drive strenght normal
124 # bit1: 0, Write Protect disabled
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/Marvell/guruplug/
H A Dkwbimage.cfg62 # bit1-0: 01, Cs0width=x8
96 # bit1: 0, DDR drive strenght normal
124 # bit1: 0, Write Protect disabled
137 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/Seagate/dockstar/
H A Dkwbimage.cfg65 # bit1-0: 00, Cs0width=x8
99 # bit1: 0, DDR drive strenght normal
127 # bit1: 0, Write Protect disabled
140 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/Synology/ds109/
H A Dkwbimage.cfg66 # bit1-0: 01, Cs0width=x8
100 # bit1: 0, DDR drive strenght normal
128 # bit1: 0, Write Protect disabled
143 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/Marvell/dreamplug/
H A Dkwbimage.cfg63 # bit1-0: 01, Cs0width=x8
97 # bit1: 0, DDR drive strenght normal
125 # bit1: 0, Write Protect disabled
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/Seagate/goflexhome/
H A Dkwbimage.cfg68 # bit1-0: 00, Cs0width=x8
102 # bit1: 0, DDR drive strenght normal
130 # bit1: 0, Write Protect disabled
143 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/Marvell/sheevaplug/
H A Dkwbimage.cfg62 # bit1-0: 00, Cs0width=x8
96 # bit1: 0, DDR drive strenght normal
124 # bit1: 0, Write Protect disabled
137 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/LaCie/netspace_v2/
H A Dkwbimage.cfg62 # bit1-0: 00, Cs0width=x8
96 # bit1: 1, DDR drive strenght reduced
124 # bit1: 0, Write Protect disabled
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
H A Dkwbimage-is2.cfg62 # bit1-0: 00, Cs0width=x8
96 # bit1: 1, DDR drive strenght reduced
124 # bit1: 0, Write Protect disabled
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
H A Dkwbimage-ns2l.cfg62 # bit1-0: 00, Cs0width=x8
96 # bit1: 1, DDR drive strenght reduced
124 # bit1: 0, Write Protect disabled
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/cloudengines/pogo_e02/
H A Dkwbimage.cfg66 # bit1-0: 00, Cs0width=x8
100 # bit1: 0, DDR drive strenght normal
128 # bit1: 0, Write Protect disabled
146 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/raidsonic/ib62x0/
H A Dkwbimage.cfg63 # bit1-0: 00, Cs0width (x8)
97 # bit1: 0, DDR drive strenght normal
125 # bit1: 0x0, Write Protect disabled
143 # bit1-0: 0x0, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/keymile/km_arm/
H A Dkwbimage.cfg83 # bit1-0: 01, Cs0width=x16
108 # bit1: 0, DDR drive strenght normal
135 # bit1: 0, Write Protect disabled
149 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
H A Dkwbimage-memphis.cfg86 # bit1-0: 01, Cs0width=x16
111 # bit1: 1, DDR drive strenght reduced
150 # bit1: 0, Write Protect disabled
164 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/LaCie/net2big_v2/
H A Dkwbimage.cfg62 # bit1-0: 01, Cs0width=x16
96 # bit1: 1, DDR drive strenght reduced
124 # bit1: 0, Write Protect disabled
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/iomega/iconnect/
H A Dkwbimage.cfg62 # bit1-0: 00, Cs0width (x8)
96 # bit1: 0, DDR drive strenght normal
124 # bit1: 0x0, Write Protect disabled
142 # bit1-0: 0x0, ODT0 controlled by ODT Control (low) register above
/rk3399_rockchip-uboot/board/d-link/dns325/
H A Dkwbimage.cfg72 # bit1-0: 0, Cs0width=x8
106 # bit1: 0, DRAM drive strength normal
146 # bit1: 0, Write Protect disabled
154 # bit1: 0, Write Protect disabled
171 # bit1-0: 0, M_ODT[0] assertion is controlled by ODT Control Low register
/rk3399_rockchip-uboot/board/buffalo/lsxl/
H A Dkwbimage-lschl.cfg77 # bit1-0: 1, Cs0width=x16
115 # bit1: 1, DRAM drive strength reduced
162 # bit1: 0, Write Protect disabled
190 # bit1-0: 0, M_ODT[0] assertion is controlled by ODT Control Low register
H A Dkwbimage-lsxhl.cfg77 # bit1-0: 0, Cs0width=x8
115 # bit1: 1, DRAM drive strength reduced
162 # bit1: 0, Write Protect disabled
190 # bit1-0: 0, M_ODT[0] assertion is controlled by ODT Control Low register
/rk3399_rockchip-uboot/board/Marvell/openrd/
H A Dkwbimage.cfg62 # bit1-0: 00, Cs0width=x8
96 # bit1: 1, DDR drive strength reduced
124 # bit1: 0, Write Protect disabled
/rk3399_rockchip-uboot/arch/arm/dts/
H A Darmada-xp-synology-ds414.dts318 syno_id_bit1_pin: syno-id-bit1-pin {