| /rk3399_rockchip-uboot/doc/device-tree-bindings/leds/ |
| H A D | leds-bcm6358.txt | 18 - brcm,clk-dat-low : Boolean, makes clock and data signals active low.
28 - active-low : Boolean, makes LED active low.
41 active-low;
46 active-low;
51 active-low;
56 active-low;
72 active-low;
77 active-low;
87 active-low;
96 active-low;
[all …]
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| H A D | leds-bcm6328.txt | 24 - brcm,serial-clk-low : Boolean, makes clock signal active low.
26 - brcm,serial-dat-low : Boolean, makes data signal active low.
38 - active-low : Boolean, makes LED active low.
51 active-low;
56 active-low;
61 active-low;
78 active-low;
83 active-low;
88 active-low;
93 active-low;
[all …]
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/video/ |
| H A D | display-timing.txt | 26 - hsync-active: hsync pulse is active low/high/ignored
27 - vsync-active: vsync pulse is active low/high/ignored
28 - de-active: data-enable pulse is active low/high/ignored
29 - pixelclk-active: with
30 - active high = drive pixel data on rising edge/
32 - active low = drive pixel data on falling edge/
40 <1>: high active
41 <0>: low active
90 hsync-active = <1>;
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| H A D | displaymode.txt | 16 - hsync-active-high (bool): Hsync pulse is active high
17 - vsync-active-high (bool): Vsync pulse is active high
41 hsync-active-high;
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| /rk3399_rockchip-uboot/arch/mips/dts/ |
| H A D | netgear,cg3100d.dts | 48 active-low;
54 active-low;
60 active-low;
66 active-low;
72 active-low;
78 active-low;
84 active-low;
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| H A D | comtrend,vr-3032u.dts | 32 active-low;
38 active-low;
44 active-low;
50 active-low;
56 active-low;
62 active-low;
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| H A D | sfr,nb4-ser.dts | 63 active-low;
69 active-low;
75 active-low;
81 active-low;
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | tegra30-cardhu.dts | 238 enable-active-high;
251 enable-active-high;
263 enable-active-high;
274 enable-active-high;
284 enable-active-high;
295 enable-active-high;
306 enable-active-high;
317 enable-active-high;
330 enable-active-high;
341 enable-active-high;
[all …]
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| H A D | rk3399-evb.dts | 174 enable-active-high;
202 hsync-active = <0>;
203 vsync-active = <0>;
204 de-active = <0>;
205 pixelclk-active = <0>;
344 hsync-active = <0>;
345 vsync-active = <0>;
346 de-active = <1>;
347 pixelclk-active = <0>;
371 snps,reset-active-low;
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| H A D | at91sam9g45-gurnard.dts | 51 hsync-active = <0>;
52 vsync-active = <0>;
65 hsync-active = <0>;
66 vsync-active = <0>;
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| H A D | rk3288-evb-rk1608.dtsi | 63 enable-active-high;
76 enable-active-high;
163 snps,reset-active-low;
214 compatible = "active-semi,act8846";
458 hsync-active = <0>;
459 vsync-active = <0>;
460 de-active = <1>;
461 pixelclk-active = <0>;
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| H A D | imx7ulp-evk.dts | 62 enable-active-high;
74 enable-active-high;
84 enable-active-high;
94 enable-active-high;
324 hsync-active = <0>;
325 vsync-active = <0>;
326 de-active = <1>;
327 pixelclk-active = <0>;
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| H A D | tegra30-beaver.dts | 257 enable-active-high;
269 enable-active-high;
282 enable-active-high;
293 enable-active-high;
305 enable-active-high;
319 enable-active-high;
332 enable-active-high;
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| H A D | rv1108-evb.dts | 78 enable-active-high;
87 enable-active-high;
167 hsync-active = <0>;
168 vsync-active = <0>;
169 de-active = <0>;
170 pixelclk-active = <0>;
180 snps,reset-active-low;
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| H A D | rk3288-veyron-jerry.dts | 26 enable-active-high;
36 enable-active-high;
48 enable-active-high;
109 enable-active-high;
116 enable-active-high;
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| H A D | rk3308-evb.dts | 246 hsync-active = <0>;
247 vsync-active = <0>;
248 de-active = <0>;
249 pixelclk-active = <0>;
262 enable-active-high;
309 snps,reset-active-low;
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| H A D | at91sam9g25ek.dts | 62 vsync-active = <1>;
63 hsync-active = <1>;
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| H A D | am335x-pxm50.dts | 54 hsync-active = <1>;
55 vsync-active = <1>;
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| H A D | armada-388-gp.dts | 275 enable-active-high;
285 enable-active-high;
295 enable-active-high;
305 enable-active-high;
313 enable-active-high;
341 enable-active-high;
367 enable-active-high;
393 enable-active-high;
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| H A D | tegra124-nyan.dtsi | 359 nvidia,core-power-req-active-high;
360 nvidia,sys-clock-req-active-high;
582 enable-active-high;
600 enable-active-high;
612 enable-active-high;
623 enable-active-high;
635 enable-active-high;
647 enable-active-high;
663 enable-active-high;
684 enable-active-high;
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| /rk3399_rockchip-uboot/drivers/video/bridge/ |
| H A D | video-bridge-uclass.c | 116 int video_bridge_set_active(struct udevice *dev, bool active) in video_bridge_set_active() argument
121 debug("%s: %d\n", __func__, active); in video_bridge_set_active()
123 ret = dm_gpio_set_value(&uc_priv->sleep, !active); in video_bridge_set_active()
128 if (!active) in video_bridge_set_active()
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| /rk3399_rockchip-uboot/cmd/ |
| H A D | bootmenu.c | 36 int active; /* active menu entry */ member
62 int reverse = (entry->menu->active == entry->num); in bootmenu_print_entry()
209 if (menu->active > 0) in bootmenu_choice_entry()
210 --menu->active; in bootmenu_choice_entry()
214 if (menu->active < menu->count - 1) in bootmenu_choice_entry()
215 ++menu->active; in bootmenu_choice_entry()
220 for (i = 0; i < menu->active; ++i) in bootmenu_choice_entry()
264 menu->active = 0; in bootmenu_create()
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| /rk3399_rockchip-uboot/drivers/dma/ |
| H A D | apbh_dma.c | 129 pdesc = list_first_entry(&pchan->active, struct mxs_dma_desc, node); in mxs_dma_enable()
202 list_splice_init(&pchan->active, &pchan->done); in mxs_dma_disable()
300 INIT_LIST_HEAD(&pchan->active); in mxs_dma_request()
421 if (!list_empty(&pchan->active)) { in mxs_dma_desc_append()
422 last = list_entry(pchan->active.prev, struct mxs_dma_desc, in mxs_dma_desc_append()
436 list_add_tail(&pdesc->node, &pchan->active); in mxs_dma_desc_append()
475 list_for_each_safe(p, q, &pchan->active) { in mxs_dma_finish()
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/regulator/ |
| H A D | fixed.txt | 15 - enable-active-high: Polarity of GPIO is Active high. If this property
42 enable-active-high;
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/gpio/ |
| H A D | nvidia,tegra20-gpio.txt | 19 4 = active high level-sensitive.
20 8 = active low level-sensitive.
|