1f135c326SAndy Yan/* 2f135c326SAndy Yan * (C) Copyright 2018 Rockchip Electronics Co., Ltd 3f135c326SAndy Yan * 4f135c326SAndy Yan * SPDX-License-Identifier: GPL-2.0+ 5f135c326SAndy Yan */ 6f135c326SAndy Yan 7f135c326SAndy Yan/dts-v1/; 8f135c326SAndy Yan#include "rk3308.dtsi" 9ff6f33d0SJoseph Chen#include "rk3308-u-boot.dtsi" 10f135c326SAndy Yan#include <dt-bindings/input/input.h> 11c0ef3541SSandy Huang#include <linux/media-bus-format.h> 12f135c326SAndy Yan 13f135c326SAndy Yan/ { 14f135c326SAndy Yan model = "Rockchip RK3308 EVB"; 15f135c326SAndy Yan compatible = "rockchip,rk3308-evb", "rockchip,rk3308"; 16f135c326SAndy Yan 17df8136f0SDavid Wu adc-keys0 { 18bbbd2329SJoseph Chen u-boot,dm-pre-reloc; 19df8136f0SDavid Wu compatible = "adc-keys"; 20df8136f0SDavid Wu io-channels = <&saradc 0>; 21df8136f0SDavid Wu io-channel-names = "buttons"; 22df8136f0SDavid Wu poll-interval = <100>; 23df8136f0SDavid Wu keyup-threshold-microvolt = <1800000>; 24df8136f0SDavid Wu 25df8136f0SDavid Wu vol-up-key { 26bbbd2329SJoseph Chen u-boot,dm-pre-reloc; 27df8136f0SDavid Wu linux,code = <KEY_VOLUMEUP>; 28df8136f0SDavid Wu label = "volume up"; 29df8136f0SDavid Wu press-threshold-microvolt = <18000>; 30df8136f0SDavid Wu }; 31df8136f0SDavid Wu }; 32df8136f0SDavid Wu 33df8136f0SDavid Wu adc-keys1 { 34bbbd2329SJoseph Chen u-boot,dm-pre-reloc; 35f135c326SAndy Yan compatible = "adc-keys"; 36f135c326SAndy Yan io-channels = <&saradc 1>; 37f135c326SAndy Yan io-channel-names = "buttons"; 38f135c326SAndy Yan poll-interval = <100>; 39f135c326SAndy Yan keyup-threshold-microvolt = <1800000>; 40f135c326SAndy Yan 41f135c326SAndy Yan esc-key { 42f135c326SAndy Yan linux,code = <KEY_MUTE>; 43f135c326SAndy Yan label = "mute"; 44f135c326SAndy Yan press-threshold-microvolt = <1130000>; 45f135c326SAndy Yan }; 46f135c326SAndy Yan 47f135c326SAndy Yan home-key { 48f135c326SAndy Yan linux,code = <KEY_MODE>; 49f135c326SAndy Yan label = "mode"; 50f135c326SAndy Yan press-threshold-microvolt = <901000>; 51f135c326SAndy Yan }; 52f135c326SAndy Yan 53f135c326SAndy Yan menu-key { 54f135c326SAndy Yan linux,code = <KEY_PLAY>; 55f135c326SAndy Yan label = "play"; 56f135c326SAndy Yan press-threshold-microvolt = <624000>; 57f135c326SAndy Yan }; 58f135c326SAndy Yan 59f135c326SAndy Yan vol-down-key { 60f135c326SAndy Yan linux,code = <KEY_VOLUMEDOWN>; 61f135c326SAndy Yan label = "volume down"; 62f135c326SAndy Yan press-threshold-microvolt = <300000>; 63f135c326SAndy Yan }; 64f135c326SAndy Yan 65f135c326SAndy Yan vol-up-key { 66bbbd2329SJoseph Chen u-boot,dm-pre-reloc; 67f135c326SAndy Yan linux,code = <KEY_VOLUMEUP>; 68f135c326SAndy Yan label = "volume up"; 69df8136f0SDavid Wu press-threshold-microvolt = <18000>; 70f135c326SAndy Yan }; 71f135c326SAndy Yan }; 72f135c326SAndy Yan 73c0ef3541SSandy Huang backlight: backlight { 74c0ef3541SSandy Huang status = "disabled"; 75c0ef3541SSandy Huang compatible = "pwm-backlight"; 76c0ef3541SSandy Huang pwms = <&pwm1 0 25000 0>; 77c0ef3541SSandy Huang brightness-levels = < 78c0ef3541SSandy Huang 0 1 2 3 4 5 6 7 79c0ef3541SSandy Huang 8 9 10 11 12 13 14 15 80c0ef3541SSandy Huang 16 17 18 19 20 21 22 23 81c0ef3541SSandy Huang 24 25 26 27 28 29 30 31 82c0ef3541SSandy Huang 32 33 34 35 36 37 38 39 83c0ef3541SSandy Huang 40 41 42 43 44 45 46 47 84c0ef3541SSandy Huang 48 49 50 51 52 53 54 55 85c0ef3541SSandy Huang 56 57 58 59 60 61 62 63 86c0ef3541SSandy Huang 64 65 66 67 68 69 70 71 87c0ef3541SSandy Huang 72 73 74 75 76 77 78 79 88c0ef3541SSandy Huang 80 81 82 83 84 85 86 87 89c0ef3541SSandy Huang 88 89 90 91 92 93 94 95 90c0ef3541SSandy Huang 96 97 98 99 100 101 102 103 91c0ef3541SSandy Huang 104 105 106 107 108 109 110 111 92c0ef3541SSandy Huang 112 113 114 115 116 117 118 119 93c0ef3541SSandy Huang 120 121 122 123 124 125 126 127 94c0ef3541SSandy Huang 128 129 130 131 132 133 134 135 95c0ef3541SSandy Huang 136 137 138 139 140 141 142 143 96c0ef3541SSandy Huang 144 145 146 147 148 149 150 151 97c0ef3541SSandy Huang 152 153 154 155 156 157 158 159 98c0ef3541SSandy Huang 160 161 162 163 164 165 166 167 99c0ef3541SSandy Huang 168 169 170 171 172 173 174 175 100c0ef3541SSandy Huang 176 177 178 179 180 181 182 183 101c0ef3541SSandy Huang 184 185 186 187 188 189 190 191 102c0ef3541SSandy Huang 192 193 194 195 196 197 198 199 103c0ef3541SSandy Huang 200 201 202 203 204 205 206 207 104c0ef3541SSandy Huang 208 209 210 211 212 213 214 215 105c0ef3541SSandy Huang 216 217 218 219 220 221 222 223 106c0ef3541SSandy Huang 224 225 226 227 228 229 230 231 107c0ef3541SSandy Huang 232 233 234 235 236 237 238 239 108c0ef3541SSandy Huang 240 241 242 243 244 245 246 247 109c0ef3541SSandy Huang 248 249 250 251 252 253 254 255>; 110c0ef3541SSandy Huang default-brightness-level = <200>; 111c0ef3541SSandy Huang }; 112c0ef3541SSandy Huang 113c0ef3541SSandy Huang panel: panel { 114c0ef3541SSandy Huang compatible = "simple-panel"; 115c0ef3541SSandy Huang bus-format = <MEDIA_BUS_FMT_RGB666_1X18>; 116c0ef3541SSandy Huang backlight = <&backlight>; 117c0ef3541SSandy Huang /* enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; */ 118c0ef3541SSandy Huang enable-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 119c0ef3541SSandy Huang enable-delay-ms = <20>; 120c0ef3541SSandy Huang reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; 121c0ef3541SSandy Huang reset-value = <0>; 122c0ef3541SSandy Huang reset-delay-ms = <10>; 123c0ef3541SSandy Huang prepare-delay-ms = <20>; 124c0ef3541SSandy Huang unprepare-delay-ms = <20>; 125c0ef3541SSandy Huang disable-delay-ms = <20>; 126c0ef3541SSandy Huang /* spi-sdo-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; */ 127c0ef3541SSandy Huang spi-sdi-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; 128c0ef3541SSandy Huang spi-scl-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 129c0ef3541SSandy Huang spi-cs-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; 130c0ef3541SSandy Huang width-mm = <217>; 131c0ef3541SSandy Huang height-mm = <136>; 132c0ef3541SSandy Huang rockchip,data-mapping = "vesa"; 133c0ef3541SSandy Huang rockchip,data-width = <18>; 134c0ef3541SSandy Huang rockchip,output = "rgb"; 135b8654f90SSandy Huang rgb-mode = "p666"; 136c0ef3541SSandy Huang status = "disabled"; 137c0ef3541SSandy Huang pinctrl-names = "default"; 138c0ef3541SSandy Huang pinctrl-0 = <&spi_init_cmd>; 139c0ef3541SSandy Huang rockchip,cmd-type = "spi"; 140c0ef3541SSandy Huang 141c0ef3541SSandy Huang /* type:0 is cmd, 1 is data */ 142c0ef3541SSandy Huang panel-init-sequence = [ 143c0ef3541SSandy Huang /* type delay num val1 val2 val3 */ 144c0ef3541SSandy Huang 00 00 01 e0 145c0ef3541SSandy Huang 01 00 01 00 146c0ef3541SSandy Huang 01 00 01 07 147c0ef3541SSandy Huang 01 00 01 0f 148c0ef3541SSandy Huang 01 00 01 0d 149c0ef3541SSandy Huang 01 00 01 1b 150c0ef3541SSandy Huang 01 00 01 0a 151c0ef3541SSandy Huang 01 00 01 3c 152c0ef3541SSandy Huang 01 00 01 78 153c0ef3541SSandy Huang 01 00 01 4a 154c0ef3541SSandy Huang 01 00 01 07 155c0ef3541SSandy Huang 01 00 01 0e 156c0ef3541SSandy Huang 01 00 01 09 157c0ef3541SSandy Huang 01 00 01 1b 158c0ef3541SSandy Huang 01 00 01 1e 159c0ef3541SSandy Huang 01 00 01 0f 160c0ef3541SSandy Huang 00 00 01 e1 161c0ef3541SSandy Huang 01 00 01 00 162c0ef3541SSandy Huang 01 00 01 22 163c0ef3541SSandy Huang 01 00 01 24 164c0ef3541SSandy Huang 01 00 01 06 165c0ef3541SSandy Huang 01 00 01 12 166c0ef3541SSandy Huang 01 00 01 07 167c0ef3541SSandy Huang 01 00 01 36 168c0ef3541SSandy Huang 01 00 01 47 169c0ef3541SSandy Huang 01 00 01 47 170c0ef3541SSandy Huang 01 00 01 06 171c0ef3541SSandy Huang 01 00 01 0a 172c0ef3541SSandy Huang 01 00 01 07 173c0ef3541SSandy Huang 01 00 01 30 174c0ef3541SSandy Huang 01 00 01 37 175c0ef3541SSandy Huang 01 00 01 0f 176c0ef3541SSandy Huang 177c0ef3541SSandy Huang 00 00 01 c0 178c0ef3541SSandy Huang 01 00 01 10 179c0ef3541SSandy Huang 01 00 01 10 180c0ef3541SSandy Huang 181c0ef3541SSandy Huang 00 00 01 c1 182c0ef3541SSandy Huang 01 00 01 41 183c0ef3541SSandy Huang 184c0ef3541SSandy Huang 00 00 01 c5 185c0ef3541SSandy Huang 01 00 01 00 186c0ef3541SSandy Huang 01 00 01 22 187c0ef3541SSandy Huang 01 00 01 80 188c0ef3541SSandy Huang 189c0ef3541SSandy Huang 00 00 01 36 190c0ef3541SSandy Huang 01 00 01 48 191c0ef3541SSandy Huang 192c0ef3541SSandy Huang 00 00 01 3a /* interface mode control */ 193c0ef3541SSandy Huang 01 00 01 66 194c0ef3541SSandy Huang 195c0ef3541SSandy Huang 00 00 01 b0 /* interface mode control */ 196c0ef3541SSandy Huang 01 00 01 00 197c0ef3541SSandy Huang 198c0ef3541SSandy Huang 00 00 01 b1 /* frame rate 70hz */ 199c0ef3541SSandy Huang 01 00 01 b0 200c0ef3541SSandy Huang 01 00 01 11 201c0ef3541SSandy Huang 00 00 01 b4 202c0ef3541SSandy Huang 01 00 01 02 203c0ef3541SSandy Huang 00 00 01 B6 /* RGB/MCU Interface Control */ 204c0ef3541SSandy Huang 01 00 01 32 /* 02 mcu, 32 rgb */ 205c0ef3541SSandy Huang 01 00 01 02 206c0ef3541SSandy Huang 207c0ef3541SSandy Huang 00 00 01 b7 208c0ef3541SSandy Huang 01 00 01 c6 209c0ef3541SSandy Huang 210c0ef3541SSandy Huang 00 00 01 be 211c0ef3541SSandy Huang 01 00 01 00 212c0ef3541SSandy Huang 01 00 01 04 213c0ef3541SSandy Huang 214c0ef3541SSandy Huang 00 00 01 e9 215c0ef3541SSandy Huang 01 00 01 00 216c0ef3541SSandy Huang 217c0ef3541SSandy Huang 00 00 01 f7 218c0ef3541SSandy Huang 01 00 01 a9 219c0ef3541SSandy Huang 01 00 01 51 220c0ef3541SSandy Huang 01 00 01 2c 221c0ef3541SSandy Huang 01 00 01 82 222c0ef3541SSandy Huang 223c0ef3541SSandy Huang 00 78 01 11 224c0ef3541SSandy Huang 00 00 01 29 225c0ef3541SSandy Huang ]; 226c0ef3541SSandy Huang 227c0ef3541SSandy Huang panel-exit-sequence = [ 228c0ef3541SSandy Huang /* type delay num val1 val2 val3 */ 229c0ef3541SSandy Huang 00 0a 01 28 230c0ef3541SSandy Huang 00 78 01 10 231c0ef3541SSandy Huang ]; 232c0ef3541SSandy Huang 233c0ef3541SSandy Huang display-timings { 234c0ef3541SSandy Huang native-mode = <&kd050fwfba002_timing>; 235c0ef3541SSandy Huang 236c0ef3541SSandy Huang kd050fwfba002_timing: timing0 { 237c0ef3541SSandy Huang clock-frequency = <11000000>; 238c0ef3541SSandy Huang hactive = <320>; 239c0ef3541SSandy Huang vactive = <480>; 240c0ef3541SSandy Huang hback-porch = <10>; 241c0ef3541SSandy Huang hfront-porch = <4>; 242c0ef3541SSandy Huang vback-porch = <10>; 243c0ef3541SSandy Huang vfront-porch = <4>; 244c0ef3541SSandy Huang hsync-len = <20>; 245c0ef3541SSandy Huang vsync-len = <20>; 246c0ef3541SSandy Huang hsync-active = <0>; 247c0ef3541SSandy Huang vsync-active = <0>; 248c0ef3541SSandy Huang de-active = <0>; 249c0ef3541SSandy Huang pixelclk-active = <0>; 250c0ef3541SSandy Huang }; 251c0ef3541SSandy Huang }; 252c0ef3541SSandy Huang 253c0ef3541SSandy Huang port { 254c0ef3541SSandy Huang panel_in_rgb: endpoint { 255c0ef3541SSandy Huang remote-endpoint = <&rgb_out_panel>; 256c0ef3541SSandy Huang }; 257c0ef3541SSandy Huang }; 258c0ef3541SSandy Huang }; 259c0ef3541SSandy Huang 260374b8444SAndy Yan vbus_host: vbus-host-regulator { 261374b8444SAndy Yan compatible = "regulator-fixed"; 262374b8444SAndy Yan enable-active-high; 263374b8444SAndy Yan gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 264374b8444SAndy Yan pinctrl-names = "default"; 265374b8444SAndy Yan pinctrl-0 = <&usb_drv>; 266374b8444SAndy Yan regulator-name = "vbus_host"; 267374b8444SAndy Yan }; 268374b8444SAndy Yan 2699717771cSAndy Yan vdd_log: vdd_core: vdd-core { 2709717771cSAndy Yan compatible = "pwm-regulator"; 2719717771cSAndy Yan pwms = <&pwm0 0 5000 1>; 2729717771cSAndy Yan regulator-name = "vdd_core"; 2739717771cSAndy Yan regulator-min-microvolt = <847000>; 2749717771cSAndy Yan regulator-max-microvolt = <1366000>; 2759717771cSAndy Yan regulator-init-microvolt = <1044000>; 2769717771cSAndy Yan regulator-always-on; 2779717771cSAndy Yan regulator-boot-on; 2789717771cSAndy Yan status = "okay"; 2799717771cSAndy Yan }; 2809717771cSAndy Yan 2819a272a61SDavid Wu vcc_phy: vcc-phy-regulator { 2829a272a61SDavid Wu compatible = "regulator-fixed"; 2839a272a61SDavid Wu regulator-name = "vcc_phy"; 2849a272a61SDavid Wu regulator-always-on; 2859a272a61SDavid Wu regulator-boot-on; 2869a272a61SDavid Wu }; 287f135c326SAndy Yan}; 288f135c326SAndy Yan 289b8654f90SSandy Huang&display_subsystem { 290b8654f90SSandy Huang status = "disabled"; 291b8654f90SSandy Huang}; 292b8654f90SSandy Huang 293f135c326SAndy Yan&emmc { 294f135c326SAndy Yan cap-mmc-highspeed; 295f135c326SAndy Yan supports-emmc; 296f135c326SAndy Yan non-removable; 297f135c326SAndy Yan num-slots = <1>; 298f135c326SAndy Yan status = "okay"; 299f135c326SAndy Yan}; 300f135c326SAndy Yan 3019a272a61SDavid Wu&mac { 3029a272a61SDavid Wu phy-supply = <&vcc_phy>; 3039a272a61SDavid Wu assigned-clocks = <&cru SCLK_MAC>; 3049a272a61SDavid Wu assigned-clock-parents = <&mac_clkin>; 3059a272a61SDavid Wu clock_in_out = "input"; 3069a272a61SDavid Wu pinctrl-names = "default"; 3079a272a61SDavid Wu pinctrl-0 = <&rmii_pins &mac_refclk>; 3089a272a61SDavid Wu snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>; 3099a272a61SDavid Wu snps,reset-active-low; 3109a272a61SDavid Wu snps,reset-delays-us = <0 50000 50000>; 3119a272a61SDavid Wu status = "disabled"; 3129a272a61SDavid Wu}; 3139a272a61SDavid Wu 3149717771cSAndy Yan&pwm0 { 3159717771cSAndy Yan status = "okay"; 3169717771cSAndy Yan}; 3179717771cSAndy Yan 318b8654f90SSandy Huang&pwm1 { 319b8654f90SSandy Huang status = "disabled"; 320b8654f90SSandy Huang}; 321b8654f90SSandy Huang 322a9bb1266SJason Zhu&sdmmc { 323a9bb1266SJason Zhu bus-width = <4>; 324a9bb1266SJason Zhu cap-mmc-highspeed; 325a9bb1266SJason Zhu cap-sd-highspeed; 326a9bb1266SJason Zhu supports-sd; 327a9bb1266SJason Zhu card-detect-delay = <800>; 328a9bb1266SJason Zhu ignore-pm-notify; 329a9bb1266SJason Zhu sd-uhs-sdr12; 330a9bb1266SJason Zhu sd-uhs-sdr25; 331a9bb1266SJason Zhu sd-uhs-sdr50; 332a9bb1266SJason Zhu sd-uhs-sdr104; 333a9bb1266SJason Zhu status = "disabled"; 334a9bb1266SJason Zhu}; 335a9bb1266SJason Zhu 3367c337686SMeng Dongyang&u2phy { 3377c337686SMeng Dongyang status = "okay"; 3387c337686SMeng Dongyang}; 3397c337686SMeng Dongyang 3407c337686SMeng Dongyang&u2phy_otg { 3417c337686SMeng Dongyang status = "okay"; 3427c337686SMeng Dongyang}; 3437c337686SMeng Dongyang 3447c337686SMeng Dongyang&u2phy_host { 3457c337686SMeng Dongyang status = "okay"; 3467c337686SMeng Dongyang}; 3477c337686SMeng Dongyang 3487c337686SMeng Dongyang&usb_host0_ehci { 3497c337686SMeng Dongyang status = "okay"; 3507c337686SMeng Dongyang}; 3517c337686SMeng Dongyang 3527c337686SMeng Dongyang&usb_host0_ohci { 3537c337686SMeng Dongyang status = "okay"; 3547c337686SMeng Dongyang}; 3557c337686SMeng Dongyang 3567c337686SMeng Dongyang&usb20_otg { 3577c337686SMeng Dongyang status = "okay"; 3587c337686SMeng Dongyang}; 359c0ef3541SSandy Huang 360c0ef3541SSandy Huang&route_rgb { 361c0ef3541SSandy Huang status = "disabled"; 362c0ef3541SSandy Huang}; 363c0ef3541SSandy Huang 364c0ef3541SSandy Huang&vop { 365c0ef3541SSandy Huang status = "disabled"; 366c0ef3541SSandy Huang}; 367c0ef3541SSandy Huang 368c0ef3541SSandy Huang&rgb { 369c0ef3541SSandy Huang status = "disabled"; 370c0ef3541SSandy Huang 371c0ef3541SSandy Huang ports { 372c0ef3541SSandy Huang rgb_out: port@1 { 373c0ef3541SSandy Huang reg = <1>; 374c0ef3541SSandy Huang #address-cells = <1>; 375c0ef3541SSandy Huang #size-cells = <0>; 376c0ef3541SSandy Huang 377c0ef3541SSandy Huang rgb_out_panel: endpoint@0 { 378c0ef3541SSandy Huang reg = <0>; 379c0ef3541SSandy Huang remote-endpoint = <&panel_in_rgb>; 380c0ef3541SSandy Huang }; 381c0ef3541SSandy Huang }; 382c0ef3541SSandy Huang }; 383c0ef3541SSandy Huang}; 384c0ef3541SSandy Huang 385c0ef3541SSandy Huang&pinctrl { 386c0ef3541SSandy Huang spi_panel { 387c0ef3541SSandy Huang spi_init_cmd: spi-init-cmd { 388c0ef3541SSandy Huang rockchip,pins = 389c0ef3541SSandy Huang /* spi sdi */ 390c0ef3541SSandy Huang <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, 391c0ef3541SSandy Huang /* spi scl */ 392c0ef3541SSandy Huang <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, 393c0ef3541SSandy Huang /* spi cs */ 394c0ef3541SSandy Huang <1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 395c0ef3541SSandy Huang }; 396c0ef3541SSandy Huang }; 397374b8444SAndy Yan 398374b8444SAndy Yan usb { 399374b8444SAndy Yan usb_drv: usb-drv { 400374b8444SAndy Yan rockchip,pins = 401374b8444SAndy Yan <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 402374b8444SAndy Yan }; 403374b8444SAndy Yan }; 404c0ef3541SSandy Huang}; 405*ed6f2c93SLin Jinhan 406*ed6f2c93SLin Jinhan&crypto { 407*ed6f2c93SLin Jinhan status = "okay"; 408*ed6f2c93SLin Jinhan}; 409