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Searched refs:SDRAM (Results 1 – 25 of 72) sorted by relevance

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/rk3399_rockchip-uboot/board/renesas/sh7785lcr/
H A DREADME.sh7785lcr11 - DDR2-SDRAM 512MB
28 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
29 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
33 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
45 address mode. This mode can use 128MB DDR-SDRAM.
48 extended address mode. This mode can use 384MB DDR-SDRAM. And if you run
49 "pmb" command, this mode can use 512MB DDR-SDRAM.
55 0x88000000 | 0x48000000 | 384MB | DDR-SDRAM (Cacheable)
59 0xa8000000 | 0x48000000 | 384MB | DDR-SDRAM (Non-cacheable)
64 0x80000000 | 0x40000000 | 512MB | DDR-SDRAM (Cacheable)
[all …]
/rk3399_rockchip-uboot/board/Synology/ds109/
H A Dopenocd.cfg44 mww 0xD0001400 0x43000C30 ;# DDR SDRAM Configuration Register
46 mww 0xD0001408 0x22125551 ;# DDR SDRAM Timing (Low) Register
47 mww 0xD000140C 0x00000833 ;# DDR SDRAM Timing (High) Register
48 mww 0xD0001410 0x0000000d ;# DDR SDRAM Address Control Register
49 mww 0xD0001414 0x00000000 ;# DDR SDRAM Open Pages Control Register
50 mww 0xD0001418 0x00000000 ;# DDR SDRAM Operation Register
51 mww 0xD000141C 0x00000C62 ;# DDR SDRAM Mode Register
52 mww 0xD0001420 0x00000042 ;# DDR SDRAM Extended Mode Register
63 mww 0xD0001494 0x003C0000 ;# DDR2 SDRAM ODT Control (Low) Register
64 mww 0xD0001498 0x00000000 ;# DDR2 SDRAM ODT Control (High) REgister
[all …]
/rk3399_rockchip-uboot/drivers/ddr/altera/
H A DKconfig2 bool "SoCFPGA DDR SDRAM driver"
5 Enable DDR SDRAM controller for the SoCFPGA devices.
/rk3399_rockchip-uboot/doc/
H A DREADME.at9114 0x20000000 - 23FFFFFF SDRAM (64 MB)
36 0x20000000 - 23FFFFFF SDRAM (64 MB)
58 0x20000000 - 23FFFFFF SDRAM (64 MB)
82 0x70000000 - 77FFFFFF SDRAM (128 MB)
98 0x20000000 - 23FFFFFF SDRAM (64 MB)
116 0x20000000 - 27FFFFFF SDRAM (128 MB)
137 0x20000000 - 3FFFFFFF SDRAM (512 MB)
H A DREADME.nand-boot-ppc44021 has to fit into 4kByte. It sets up the CPU and configures the SDRAM
23 loaded from NAND to SDRAM.
29 from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
H A DREADME.sh7752evb11 - DDR3-SDRAM 512MB
H A DREADME.sh7753evb11 - DDR3-SDRAM 512MB
/rk3399_rockchip-uboot/drivers/ram/
H A DKconfig5 This allows drivers to be provided for SDRAM and other RAM
18 setting up RAM (e.g. SDRAM / DDR) within SPL.
27 setting up RAM (e.g. SDRAM / DDR) within TPL.
30 bool "Enable STM32 SDRAM support"
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3288/
H A DKconfig30 functions. It includes 2 or 4GB of SDRAM and 16 or 32GB of
39 also includes on-board eMMC and 2GB of SDRAM. Expansion connectors
59 includes on-board eMMC and 2GB of SDRAM. Expansion connectors
68 also includes on-board eMMC and 1GB of SDRAM. Expansion connectors
77 has 1 or 2 GiB SDRAM. Expansion connectors provide access to
120 also includes on-board eMMC and 2GB of SDRAM. Expansion connectors
138 8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to
/rk3399_rockchip-uboot/board/google/
H A DKconfig18 SDRAM. It has a Panther Point platform controller hub, PCIe
40 Haswell Celeron 2955U Dual Core CPU with 2GB of SDRAM. It has a
51 LPDDR3 SDRAM. It has PCIe WiFi and Bluetooth. It also includes a
/rk3399_rockchip-uboot/board/keymile/km_arm/
H A Dkwbimage_128M16_1.cfg88 # SDRAM initalization
89 DATA 0xFFD01400 0x430004E0 # SDRAM Configuration Register
194 DATA 0xFFD01428 0x00084520 # DDR2 SDRAM Timing Low
200 # with the considered SDRAM internal delay
202 # with the considered SDRAM internal delay
205 DATA 0xFFD0147c 0x00008452 # DDR2 SDRAM Timing High
209 # with the considered SDRAM internal delay
211 # with the considered SDRAM internal delay
H A Dkwbimage_256M8_1.cfg90 # SDRAM initalization
91 DATA 0xFFD01400 0x430004E0 # SDRAM Configuration Register
196 DATA 0xFFD01428 0x00084520 # DDR2 SDRAM Timing Low
202 # with the considered SDRAM internal delay
204 # with the considered SDRAM internal delay
207 DATA 0xFFD0147c 0x00008452 # DDR2 SDRAM Timing High
211 # with the considered SDRAM internal delay
213 # with the considered SDRAM internal delay
H A Dkwbimage-memphis.cfg47 DATA 0xFFD01400 0x430004E0 # SDRAM Configuration Register
133 DATA 0xFFD01428 0x00084520 # DDR2 SDRAM Timing Low
141 DATA 0xFFD0147c 0x00008451 # DDR2 SDRAM Timing High
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.soc20 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
59 - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support
60 - One secondary 32-bit DDR4 SDRAM memory controller, intended for use by
102 - One 16-bit DDR3L SDRAM memory controller, Up to 1.0 GT/s, Supports
144 - One 64-bit DDR4 SDRAM memory controllers with ECC and interleaving
186 - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support
187 - One secondary 32-bit DDR4 SDRAM memory controller, intended for use by
225 b) No 32-bit DDR3 SDRAM memory
/rk3399_rockchip-uboot/doc/SPI/
H A DREADME.ti_qspi_flash20 execute it after storing it in SDRAM. Then, the MLO will read
21 u-boot.img from flash and execute it from SDRAM.
/rk3399_rockchip-uboot/doc/device-tree-bindings/clock/
H A Drockchip,rk3288-dmc.txt52 -rockchip,num-channels: number of SDRAM channels (1 or 2)
53 -rockchip,pctl-timing: parameters for the SDRAM setup, in this order:
93 -rockchip,sdram-channel: SDRAM channel information, each 8 bits. Both channels
103 - rockchip,sdram-params: SDRAM base parameters, in this order:
H A Drockchip,rk3399-dmc.txt13 - rockchip,sdram-params: SDRAM parameters, including all the information by ddr driver:
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3188/
H A DKconfig8 Ethernet, It also includes on-board nand and 1GB of SDRAM.
/rk3399_rockchip-uboot/board/sbc8548/
H A DREADME6 memory. It also has 128MB SDRAM 100MHz LBC memory, with both a PCI-e,
72 There is a hardware errata, which causes the older local bus SDRAM
83 the back of the PCB behind the DDR SDRAM SODIMM connector.
192 is jumpered parallel to the LBC-SDRAM, then /CS0 is for the
254 f000_0000 f7ff_ffff CS3,4 32 LB SDRAM (128MB)
/rk3399_rockchip-uboot/board/cobra5272/bdm/
H A Dcobra5272_uboot.gdb104 # CS7 -- SDRAM
119 # Dummy write to start SDRAM
/rk3399_rockchip-uboot/board/renesas/sh7757lcr/
H A DREADME.sh7757lcr11 - DDR3-SDRAM 256MB (with ECC)
/rk3399_rockchip-uboot/arch/arm/mach-socfpga/
H A Dqts-filter.sh152 * Altera SoCFPGA SDRAM configuration
/rk3399_rockchip-uboot/board/freescale/ls1021aiot/
H A DREADME9 - Supports 1GB un-buffered DDR3L SDRAM discrete
/rk3399_rockchip-uboot/board/armltd/integrator/
H A DREADME18 SDRAM
21 CMs may be fitted with varying amounts of SDRAM using a DIMM socket.
/rk3399_rockchip-uboot/board/freescale/ls1012ardb/
H A DREADME21 - 16-bit, 1 GB DDR3L SDRAM memory, running at data rates up to 1 GT/s

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