1*fa437430SKever YangRockchip Dynamic Memory Controller Driver 2*fa437430SKever YangRequired properties: 3*fa437430SKever Yang- compatible: "rockchip,rk3399-dmc", "syscon" 4*fa437430SKever Yang- rockchip,cru: this driver should access cru regs, so need get cru here 5*fa437430SKever Yang- rockchip,pmucru: this driver should access pmucru regs, so need get pmucru here 6*fa437430SKever Yang- rockchip,pmugrf: this driver should access pmugrf regs, so need get pmugrf here 7*fa437430SKever Yang- rockchip,pmusgrf: this driver should access pmusgrf regs, so need get pmusgrf here 8*fa437430SKever Yang- rockchip,cic: this driver should access cic regs, so need get cic here 9*fa437430SKever Yang- reg: dynamic ram protocol controller(PCTL) address, PHY Independent(PI) address, phy controller(PHYCTL) address and memory schedule(MSCH) address 10*fa437430SKever Yang- clock: must include clock specifiers corresponding to entries in the clock-names property. 11*fa437430SKever Yang Must contain 12*fa437430SKever Yang dmc_clk: for ddr working frequency 13*fa437430SKever Yang- rockchip,sdram-params: SDRAM parameters, including all the information by ddr driver: 14*fa437430SKever Yang Must contain 15*fa437430SKever Yang Genarate by vendor tool and adjust for U-Boot dtsi. 16*fa437430SKever Yang 17*fa437430SKever YangExample: 18*fa437430SKever Yang dmc: dmc { 19*fa437430SKever Yang u-boot,dm-pre-reloc; 20*fa437430SKever Yang compatible = "rockchip,rk3399-dmc"; 21*fa437430SKever Yang devfreq-events = <&dfi>; 22*fa437430SKever Yang interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>; 23*fa437430SKever Yang clocks = <&cru SCLK_DDRCLK>; 24*fa437430SKever Yang clock-names = "dmc_clk"; 25*fa437430SKever Yang reg = <0x0 0xffa80000 0x0 0x0800 26*fa437430SKever Yang 0x0 0xffa80800 0x0 0x1800 27*fa437430SKever Yang 0x0 0xffa82000 0x0 0x2000 28*fa437430SKever Yang 0x0 0xffa84000 0x0 0x1000 29*fa437430SKever Yang 0x0 0xffa88000 0x0 0x0800 30*fa437430SKever Yang 0x0 0xffa88800 0x0 0x1800 31*fa437430SKever Yang 0x0 0xffa8a000 0x0 0x2000 32*fa437430SKever Yang 0x0 0xffa8c000 0x0 0x1000>; 33*fa437430SKever Yang }; 34*fa437430SKever Yang 35*fa437430SKever Yang &dmc { 36*fa437430SKever Yang rockchip,sdram-params = < 37*fa437430SKever Yang 0x2 38*fa437430SKever Yang 0xa 39*fa437430SKever Yang 0x3 40*fa437430SKever Yang ... 41*fa437430SKever Yang >; 42*fa437430SKever Yang }; 43