xref: /rk3399_rockchip-uboot/board/freescale/ls1012ardb/README (revision dc557e9a1fe00ca9d884bd88feef5bebf23fede4)
1*3b6e3898SPrabhakar KushwahaOverview
2*3b6e3898SPrabhakar Kushwaha--------
3*3b6e3898SPrabhakar KushwahaQorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
4*3b6e3898SPrabhakar Kushwahadevelopment platform, with a complete debugging environment.
5*3b6e3898SPrabhakar KushwahaThe LS1012ARDB board supports the QorIQ LS1012A processor and is
6*3b6e3898SPrabhakar Kushwahaoptimized to support the high-bandwidth DDR3L memory and
7*3b6e3898SPrabhakar Kushwahaa full complement of high-speed SerDes ports.
8*3b6e3898SPrabhakar Kushwaha
9*3b6e3898SPrabhakar KushwahaLS1012A SoC Overview
10*3b6e3898SPrabhakar Kushwaha--------------------
11*3b6e3898SPrabhakar KushwahaPlease refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A
12*3b6e3898SPrabhakar KushwahaSoC overview.
13*3b6e3898SPrabhakar Kushwaha
14*3b6e3898SPrabhakar KushwahaLS1012ARDB board Overview
15*3b6e3898SPrabhakar Kushwaha-----------------------
16*3b6e3898SPrabhakar Kushwaha - SERDES Connections, 4 lanes supporting:
17*3b6e3898SPrabhakar Kushwaha      - PCI Express - 3.0
18*3b6e3898SPrabhakar Kushwaha      - SGMII, SGMII 2.5
19*3b6e3898SPrabhakar Kushwaha      - SATA 3.0
20*3b6e3898SPrabhakar Kushwaha - DDR Controller
21*3b6e3898SPrabhakar Kushwaha     - 16-bit, 1 GB DDR3L SDRAM memory, running at data rates up to 1 GT/s
22*3b6e3898SPrabhakar Kushwaha -QSPI: A dual 1:3 switch, NX3L4357GM,115 (U35) drives the QSPI chip-select
23*3b6e3898SPrabhakar Kushwaha signals to
24*3b6e3898SPrabhakar Kushwaha    - QSPI NOR flash memory (2 virtual banks)
25*3b6e3898SPrabhakar Kushwaha    - the QSPI emulator.s
26*3b6e3898SPrabhakar Kushwaha - USB 3.0
27*3b6e3898SPrabhakar Kushwaha    - one high-speed USB 2.0/3.0 port.
28*3b6e3898SPrabhakar Kushwaha - Two enhanced secure digital host controllers:
29*3b6e3898SPrabhakar Kushwaha    - SDHC1 controller can be connected to onboard SDHC connector
30*3b6e3898SPrabhakar Kushwaha    - SDHC2 controller: Three dual 1:4 mux/demux devices,
31*3b6e3898SPrabhakar Kushwaha    74CBTLV3253DS (U30, U31, U33) drive the SDHC2 signals to eMMC,
32*3b6e3898SPrabhakar Kushwaha    SDIO WiFi, SPI, and Ardiuno shield
33*3b6e3898SPrabhakar Kushwaha - 2 I2C controllers
34*3b6e3898SPrabhakar Kushwaha - One SATA onboard connectors
35*3b6e3898SPrabhakar Kushwaha - UART
36*3b6e3898SPrabhakar Kushwaha   - The LS1012A processor consists of two UART controllers,
37*3b6e3898SPrabhakar Kushwaha   out of which only UART1 is used on RDB.
38*3b6e3898SPrabhakar Kushwaha - ARM JTAG support
39*3b6e3898SPrabhakar Kushwaha
40*3b6e3898SPrabhakar KushwahaBooting Options
41*3b6e3898SPrabhakar Kushwaha---------------
42*3b6e3898SPrabhakar Kushwahaa) QSPI Flash Emu Boot
43*3b6e3898SPrabhakar Kushwahab) QSPI Flash 1
44*3b6e3898SPrabhakar Kushwahac) QSPI Flash 2
45*3b6e3898SPrabhakar Kushwaha
46*3b6e3898SPrabhakar KushwahaQSPI flash map
47*3b6e3898SPrabhakar Kushwaha--------------
48*3b6e3898SPrabhakar KushwahaImages		| Size	|QSPI Flash Address
49*3b6e3898SPrabhakar Kushwaha------------------------------------------
50*3b6e3898SPrabhakar KushwahaRCW + PBI	| 1MB	| 0x4000_0000
51*3b6e3898SPrabhakar KushwahaU-boot 		| 1MB	| 0x4010_0000
52*3b6e3898SPrabhakar KushwahaU-boot Env 	| 1MB	| 0x4020_0000
53*3b6e3898SPrabhakar KushwahaPPA FIT image	| 2MB	| 0x4050_0000
54*3b6e3898SPrabhakar KushwahaLinux ITB	| ~53MB | 0x40A0_0000
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