Searched refs:EN_MASK (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/drivers/video/drm/ |
| H A D | rockchip_vop2.c | 46 #define EN_MASK 1 macro
1883 EN_MASK, DSP_LUT_EN_SHIFT, 1, false); in rk3568_vop2_load_lut()
1905 EN_MASK, DSP_LUT_EN_SHIFT, 1, false); in rk3588_vop2_load_lut()
1907 EN_MASK, GAMMA_UPDATE_EN_SHIFT, 1, false); in rk3588_vop2_load_lut()
2024 EN_MASK, LUT_DMA_EN_SHIFT, 1, false); in rockchip_vop2_cubic_lut_init()
2026 EN_MASK, VP0_3D_LUT_EN_SHIFT, 1, false); in rockchip_vop2_cubic_lut_init()
2028 EN_MASK, VP0_3D_LUT_UPDATE_SHIFT, 1, false); in rockchip_vop2_cubic_lut_init()
2485 EN_MASK, PD_VOP_CLUSTER_REPAIR_ENA_SHIFT); in rk3576_vop2_wait_power_domain_on()
2487 EN_MASK, PD_VOP_CLUSTER_REPAIR_ENA_SHIFT); in rk3576_vop2_wait_power_domain_on()
2498 EN_MASK, PD_VOP_ESMART_REPAIR_ENA_SHIFT); in rk3576_vop2_wait_power_domain_on()
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/bcm281xx/ |
| H A D | reset.c | 11 #define EN_MASK 0x08000000 /* Enable timer */ macro
22 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); in reset_cpu()
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