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Searched refs:CQSPI_REG_CONFIG (Results 1 – 1 of 1) sorted by relevance

/rk3399_rockchip-uboot/drivers/spi/
H A Dcadence_qspi_apb.c52 #define CQSPI_REG_CONFIG 0x00 macro
162 ((readl(base + CQSPI_REG_CONFIG) >> \
189 reg = readl(reg_base + CQSPI_REG_CONFIG); in cadence_qspi_apb_controller_enable()
191 writel(reg, reg_base + CQSPI_REG_CONFIG); in cadence_qspi_apb_controller_enable()
197 reg = readl(reg_base + CQSPI_REG_CONFIG); in cadence_qspi_apb_controller_disable()
199 writel(reg, reg_base + CQSPI_REG_CONFIG); in cadence_qspi_apb_controller_disable()
260 reg = readl(reg_base + CQSPI_REG_CONFIG); in cadence_qspi_apb_config_baudrate_div()
278 writel(reg, reg_base + CQSPI_REG_CONFIG); in cadence_qspi_apb_config_baudrate_div()
288 reg = readl(reg_base + CQSPI_REG_CONFIG); in cadence_qspi_apb_set_clk_mode()
296 writel(reg, reg_base + CQSPI_REG_CONFIG); in cadence_qspi_apb_set_clk_mode()
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