Searched refs:CLK_PWM1_DIV_SHIFT (Results 1 – 6 of 6) sorted by relevance
183 CLK_PWM1_DIV_SHIFT = 6, enumerator184 CLK_PWM1_DIV_MASK = 0xf << CLK_PWM1_DIV_SHIFT,
185 CLK_PWM1_DIV_SHIFT = 8, enumerator186 CLK_PWM1_DIV_MASK = 0x7f << CLK_PWM1_DIV_SHIFT,
379 CLK_PWM1_DIV_SHIFT = 6, enumerator380 CLK_PWM1_DIV_MASK = 0x3 << CLK_PWM1_DIV_SHIFT,
739 div = (con & CLK_PWM1_DIV_MASK) >> CLK_PWM1_DIV_SHIFT; in rk3506_pwm_get_rate()784 ((div - 1) << CLK_PWM1_DIV_SHIFT)); in rk3506_pwm_set_rate()
604 CLK_PWM1_DIV_SHIFT; in rv1126b_pwm_get_clk()669 CLK_PWM1_DIV_SHIFT)); in rv1126b_pwm_set_clk()
277 div = (con & CLK_PWM1_DIV_MASK) >> CLK_PWM1_DIV_SHIFT; in rv1126_pwm_get_pmuclk()325 (src_clk_div - 1) << CLK_PWM1_DIV_SHIFT); in rv1126_pwm_set_pmuclk()