| /rk3399_rockchip-uboot/arch/arm/mach-keystone/include/mach/ |
| H A D | clock.h | 35 #define CLK_LIST(CLK)\ argument 36 CLK(0, core_pll_clk)\ 37 CLK(1, pass_pll_clk)\ 38 CLK(2, tetris_pll_clk)\ 39 CLK(3, ddr3a_pll_clk)\ 40 CLK(4, ddr3b_pll_clk)\ 41 CLK(5, sys_clk0_clk)\ 42 CLK(6, sys_clk0_1_clk)\ 43 CLK(7, sys_clk0_2_clk)\ 44 CLK(8, sys_clk0_3_clk)\ [all …]
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra124/ |
| H A D | clock.c | 73 #define CLK(x) CLOCK_ID_ ## x macro 75 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC), 76 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 78 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO), 79 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 81 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC), 82 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 84 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(NONE), 85 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 87 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC), [all …]
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra210/ |
| H A D | clock.c | 75 #define CLK(x) CLOCK_ID_ ## x macro 77 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC), 78 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 80 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO), 81 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 83 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC), 84 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 86 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(NONE), 87 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 89 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC), [all …]
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra114/ |
| H A D | clock.c | 63 #define CLK(x) CLOCK_ID_ ## x macro 65 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC), 66 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 68 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO), 69 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 71 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC), 72 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 74 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(NONE), 75 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 77 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC), [all …]
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra30/ |
| H A D | clock.c | 63 #define CLK(x) CLOCK_ID_ ## x macro 65 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC), 66 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 68 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO), 69 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 71 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC), 72 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 74 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(NONE), 75 CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), 77 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC), [all …]
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra20/ |
| H A D | clock.c | 60 #define CLK(x) CLOCK_ID_ ## x macro 62 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC) }, 63 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO) }, 64 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC) }, 65 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(NONE) }, 66 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC) }, 67 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC) }, 68 { CLK(PERIPH), CLK(CGENERAL), CLK(XCPU), CLK(OSC) }, 69 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC) },
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| /rk3399_rockchip-uboot/drivers/clk/ |
| H A D | Kconfig | 3 config CLK config 15 depends on CLK && SPL && SPL_DM 25 depends on CLK && TPL_DM 35 depends on CLK && ARCH_BMIPS 43 depends on CLK 51 depends on CLK && ARCH_ZYNQ
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| H A D | Makefile | 8 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o
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| /rk3399_rockchip-uboot/doc/SPI/ |
| H A D | README.dual-flash | 23 | | CLK | | 36 | | | CLK | (SPI/QSPI) | 42 | | CLK | | (SPI/QSPI) | 66 | | CLK | (SPI/QSPI) | 72 | | CLK | (SPI/QSPI) |
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| /rk3399_rockchip-uboot/include/ |
| H A D | clk.h | 80 #if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK) 173 CONFIG_IS_ENABLED(CLK)
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| /rk3399_rockchip-uboot/board/freescale/bsc9132qds/ |
| H A D | README | 94 make BSC9132QDS_NOR_DDRCLK100 : For 100MHZ DDR CLK 95 make BSC9132QDS_NOR_DDRCLK133 : For 133MHZ DDR CLK 98 make BSC9132QDS_SPIFLASH_DDRCLK100 : For 100MHZ DDR CLK 99 make BSC9132QDS_SPIFLASH_DDRCLK133 : For 133MHZ DDR CLK 101 make BSC9132QDS_SDCARD_DDRCLK100 : For 100MHZ DDR CLK 102 make BSC9132QDS_SDCARD_DDRCLK133 : For 133MHZ DDR CLK
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | Kconfig | 3 depends on CLK
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| /rk3399_rockchip-uboot/drivers/clk/uniphier/ |
| H A D | Kconfig | 4 select CLK
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| /rk3399_rockchip-uboot/drivers/net/ |
| H A D | macb.c | 765 config = MACB_BF(CLK, MACB_CLK_DIV8); in macb_mdc_clk_div() 767 config = MACB_BF(CLK, MACB_CLK_DIV16); in macb_mdc_clk_div() 769 config = MACB_BF(CLK, MACB_CLK_DIV32); in macb_mdc_clk_div() 771 config = MACB_BF(CLK, MACB_CLK_DIV64); in macb_mdc_clk_div() 787 config = GEM_BF(CLK, GEM_CLK_DIV8); in gem_mdc_clk_div() 789 config = GEM_BF(CLK, GEM_CLK_DIV16); in gem_mdc_clk_div() 791 config = GEM_BF(CLK, GEM_CLK_DIV32); in gem_mdc_clk_div() 793 config = GEM_BF(CLK, GEM_CLK_DIV48); in gem_mdc_clk_div() 795 config = GEM_BF(CLK, GEM_CLK_DIV64); in gem_mdc_clk_div() 797 config = GEM_BF(CLK, GEM_CLK_DIV96); in gem_mdc_clk_div()
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| /rk3399_rockchip-uboot/drivers/clk/renesas/ |
| H A D | Kconfig | 3 depends on CLK && ARCH_RMOBILE
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| /rk3399_rockchip-uboot/drivers/clk/exynos/ |
| H A D | Kconfig | 3 select CLK
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/i2c/ |
| H A D | i2c-gpio.txt | 28 <&gpd1 1 GPIO_ACTIVE_HIGH>; /* CLK */
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| /rk3399_rockchip-uboot/drivers/usb/host/ |
| H A D | dwc3-of-simple.c | 57 #if CONFIG_IS_ENABLED(CLK) in dwc3_of_simple_clk_init()
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| /rk3399_rockchip-uboot/board/freescale/m52277evb/ |
| H A D | README | 144 CPU CLK 160 Mhz BUS CLK 80 Mhz FLB CLK 80 MHZ 145 INP CLK 16 Mhz VCO CLK 480 Mhz
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.m54418twr | 134 CPU CLK 250 MHz BUS CLK 125 MHz FLB CLK 125 MHz 135 INP CLK 50 MHz VCO CLK 500 MHz
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| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | rockchip_sfc.c | 266 #if CONFIG_IS_ENABLED(CLK) 345 #if CONFIG_IS_ENABLED(CLK) in rockchip_sfc_ofdata_to_platdata() 371 #if CONFIG_IS_ENABLED(CLK) in rockchip_sfc_probe() 396 #if CONFIG_IS_ENABLED(CLK) in rockchip_sfc_probe() 709 #if CONFIG_IS_ENABLED(CLK) 835 #if CONFIG_IS_ENABLED(CLK) in rockchip_sfc_exec_op() 892 #if CONFIG_IS_ENABLED(CLK) in rockchip_sfc_set_speed()
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| /rk3399_rockchip-uboot/drivers/thermal/ |
| H A D | Kconfig | 28 depends on CLK
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| /rk3399_rockchip-uboot/board/freescale/m54455evb/ |
| H A D | README | 216 CPU CLK 266 Mhz BUS CLK 133 Mhz FLB CLK 66 Mhz 217 PCI CLK 33 Mhz INP CLK 33 Mhz VCO CLK 533 Mhz
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| /rk3399_rockchip-uboot/drivers/clk/at91/ |
| H A D | Kconfig | 3 depends on CLK
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| /rk3399_rockchip-uboot/board/renesas/MigoR/ |
| H A D | lowlevel_init.S | 57 ! 0xA504 -> timer_STOP / CLK = 500ms
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