clk: rockchip: rv1106: support rockchip image tiny

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I59bc654ea6ebd3a9c7e847b99433c713b850ed6e

dm: scmi: add build control for scmi smccc and clk

There are not scmi clk and smccc agent available for SPL/TPL.

But in SPL/TPL, we still need smccc agent driver to trigger
scmi uclass to setup it'

dm: scmi: add build control for scmi smccc and clk

There are not scmi clk and smccc agent available for SPL/TPL.

But in SPL/TPL, we still need smccc agent driver to trigger
scmi uclass to setup it's all protocols, then there should be
a fake plat-specific scmi clk implementation to take over the
clk get/set operation from clk_scmi.c.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia0ebfa96b2aa6318083ddcd868af9381c74fb80c

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UPSTREAM: clk: add clock driver for SCMI agents

This change introduces a clock driver for SCMI agent devices. When
SCMI agent and SCMI clock drivers are enabled, SCMI agent binds a
clock device for

UPSTREAM: clk: add clock driver for SCMI agents

This change introduces a clock driver for SCMI agent devices. When
SCMI agent and SCMI clock drivers are enabled, SCMI agent binds a
clock device for each SCMI clock protocol devices enabled in the FDT.

SCMI clock driver is embedded upon CONFIG_CLK_SCMI=y. If enabled,
CONFIG_SCMI_AGENT is also enabled.

SCMI Clock protocol is defined in the SCMI specification [1].

Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Conflics:
drivers/clk/Kconfig
drivers/clk/Makefile

(cherry picked from commit 60388844836f5639e6c9a4331335ff22298128da)
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2063cff170f75be6edb169619c7321a07051583c

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UPSTREAM: clk: Kconfig: Add dependences of SPL_CLK

The SPL_CLK config should depend on SPL && SPL_DM.

Change-Id: I86d4b934bebde3d4661143902b71e198608ff688
Signed-off-by: Wenyou Yang <wenyou.yang@mi

UPSTREAM: clk: Kconfig: Add dependences of SPL_CLK

The SPL_CLK config should depend on SPL && SPL_DM.

Change-Id: I86d4b934bebde3d4661143902b71e198608ff688
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 0712b672d2a1f9a156c489b4dd7ce8354c2b3e1f)

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Merge branch 'master' of git://git.denx.de/u-boot-rockchip

spl: dm: Kconfig: split CLK support for SPL and TPL

Introduce TPL_CLK to allow finer-grained selection of TPL features
for feature-rich (i.e. DM-based) TPL stages.

Signed-off-by: Philipp Tomsich <p

spl: dm: Kconfig: split CLK support for SPL and TPL

Introduce TPL_CLK to allow finer-grained selection of TPL features
for feature-rich (i.e. DM-based) TPL stages.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

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spl: dm: Kconfig: SPL_CLK depends on SPL_DM

SPL_CLK should also depend on SPL_DM (and not just on CLK).
Add the additional dependency.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-syst

spl: dm: Kconfig: SPL_CLK depends on SPL_DM

SPL_CLK should also depend on SPL_DM (and not just on CLK).
Add the additional dependency.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

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Merge branch 'rmobile' of git://git.denx.de/u-boot-sh

clk: rmobile: Add RCar Gen3 clock driver

Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs .
This driver allows reading out the clock configuration set by
previous boot stages and enabling

clk: rmobile: Add RCar Gen3 clock driver

Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs .
This driver allows reading out the clock configuration set by
previous boot stages and enabling and disabling clock using
the MSTP registers. Setting clock is not supported thus far.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

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Merge branch 'master' of git://git.denx.de/u-boot-mips

dm: clk: add BCM6345 clock driver

This is a simplified version of linux/arch/mips/bcm63xx/clk.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Merge tag 'xilinx-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.05

- Move to DM clk driver
- Add clk support for zynq_sdhci

clk: zynq: Add zynq clock framework driver

Add a clock framework driver for the zynq platform. The driver is based
on the platform zynq clock driver but reworked to use static functions
instead of r

clk: zynq: Add zynq clock framework driver

Add a clock framework driver for the zynq platform. The driver is based
on the platform zynq clock driver but reworked to use static functions
instead of run-time generated objects even for unused clocks.
Additionally the CONFIG_ZYNQ_PS_CLK_FREQ is replaced by the
ps-clk-frequency from the device tree.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.03

- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk support
- Simple clk driv

Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.03

- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk support
- Simple clk driver for ZynqMP
- Other small changes

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clk: zynqmp: Add clock driver support for zynqmp

Add basic clock driver support for zynqmp which
sets the required clock for GEM controller

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx

clk: zynqmp: Add clock driver support for zynqmp

Add basic clock driver support for zynqmp which
sets the required clock for GEM controller

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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Merge branch 'master' of git://git.denx.de/u-boot-mips

clk: boston: Providea simple driver for Boston board clocks

Add a simple driver for the clocks provided by the MIPS Boston
development board. The system provides information about 2 clocks whose
rat

clk: boston: Providea simple driver for Boston board clocks

Add a simple driver for the clocks provided by the MIPS Boston
development board. The system provides information about 2 clocks whose
rates are fixed by the bitfile flashed in the boards FPGA, and this
driver simply reads the rates of these 2 clocks.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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Merge branch 'master' of git://git.denx.de/u-boot-atmel

clk: at91: Add clock driver

The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.co

clk: at91: Add clock driver

The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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clock: add Tegra186 clock driver

In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP
(Boot and Power Management Processor). This change implements a driver
that does that. A te

clock: add Tegra186 clock driver

In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP
(Boot and Power Management Processor). This change implements a driver
that does that. A tegra/ sub-directory is created to follow the existing
pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually
any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

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Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

Merge http://git.denx.de/u-boot-samsung

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
configs/peach-pi_defconfig
configs/peach-pit_defconfig

clk: exynos: add clock driver for Exynos7420 Soc

Add a clock driver for Exynos7420 SoC. There are about 25 clock controller
blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks

clk: exynos: add clock driver for Exynos7420 Soc

Add a clock driver for Exynos7420 SoC. There are about 25 clock controller
blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks
are added in this initial version of the driver.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

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Merge branch 'master' of git://git.denx.de/u-boot-uniphier

clk: uniphier: add Media I/O clock driver for UniPhier SoCs

This is the initial commit for the UniPhier clock drivers.
Currently, only the Media I/O clock is supported.

Signed-off-by: Masahiro Yama

clk: uniphier: add Media I/O clock driver for UniPhier SoCs

This is the initial commit for the UniPhier clock drivers.
Currently, only the Media I/O clock is supported.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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