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Searched refs:w2 (Results 1 – 25 of 43) sorted by relevance

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/rk3399_ARM-atf/plat/st/stm32mp2/aarch64/
H A Dstm32mp2_helper.S93 ldr w2, =DEBUG_UART_RST_BIT
95 orr w0, w0, w2
109 ldr w2, [x1]
111 orr w2, w2, #DEBUG_UART_TX_GPIO_BANK_CLK_EN
112 str w2, [x1]
115 ldr w2, [x1, #GPIO_MODE_OFFSET]
116 bic w2, w2, #(GPIO_MODE_MASK << GPIO_TX_SHIFT)
117 orr w2, w2, #(GPIO_MODE_ALTERNATE << GPIO_TX_SHIFT)
118 str w2, [x1, #GPIO_MODE_OFFSET]
120 ldr w2, [x1, #GPIO_SPEED_OFFSET]
[all …]
/rk3399_ARM-atf/plat/qti/common/src/aarch64/
H A Dqti_uart_console.S49 1: ldr w2, [x1, #GENI_STATUS_REG]
50 and w2, w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
51 cmp w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
59 mov w2, #0x1
61 str w2, [x1, #UART_TX_TRANS_LEN_REG]
62 mov w2, #GENI_M_CMD_TX
63 str w2, [x1, #GENI_M_CMD0_REG]
68 2: ldr w2, [x1, #GENI_STATUS_REG]
69 and w2, w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
70 cmp w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/uart/
H A D8250_console.S33 cbz w2, core_init_fail
45 cmp w2, w3
49 lsl w2, w2, #4
54 1: lsl w2, w2, #2
61 udiv w3, w1, w2 /* divisor = uartclk / (quot * baudrate) */
62 msub w1, w3, w2, w1 /* remainder = uartclk % (quot * baudrate) */
63 lsr w2, w2, #1
64 cmp w1, w2
112 1: ldr w2, [x1, #UART_LSR]
113 and w2, w2, #UART_LSR_THRE
[all …]
/rk3399_ARM-atf/drivers/ti/uart/aarch64/
H A D16550_console.S45 cbz w2, init_fail
49 lsl w2, w2, #4
50 udiv w2, w1, w2
51 and w1, w2, #0xff /* w1 = DLL */
52 lsr w2, w2, #8
53 and w2, w2, #0xff /* w2 = DLLM */
58 str w2, [x0, #UARTDLLM] /* program DLLM */
59 mov w2, #~UARTLCR_DLAB
60 and w3, w3, w2
147 1: ldr w2, [x1, #UARTLSR]
[all …]
/rk3399_ARM-atf/drivers/nxp/console/
H A D16550_console.S98 cbz w2, init_fail
102 lsl w2, w2, #4
103 udiv w2, w1, w2
104 and w1, w2, #0xff /* w1 = DLL */
105 lsr w2, w2, #8
106 and w2, w2, #0xff /* w2 = DLLM */
111 strb w2, [x0, #UARTDLLM] /* program DLLM */
112 mov w2, #~UARTLCR_DLAB
113 and w3, w3, w2
196 1: ldrb w2, [x1, #UARTLSR]
[all …]
H A Dlinflex_console.S223 ldr w2, [x1, LINFLEX_UARTCR]
224 and w2, w2, #UARTCR_TFBM
225 cmp w2, #0x0
230 ldr w2, [x1, LINFLEX_UARTSR]
231 and w2, w2, #UARTSR_DTF
232 cmp w2, #0
242 ldr w2, [x1, LINFLEX_UARTSR]
243 and w3, w2, #UARTSR_DTF
251 mov w2, #UARTSR_DTF
252 str w2, [x1, LINFLEX_UARTSR]
/rk3399_ARM-atf/drivers/renesas/common/scif/
H A Dscif.S137 mvn w2, w1
138 str w2, [x0, #CPG_CPGWPR]
164 mov w2, #SCSCR_CKE_INT_CLK
165 orr w1, w1, w2
175 mov w2, #PRR_PRODUCT_H3_VER_10
176 cmp w1, w2
179 mov w2, #PRR_PRODUCT_D3
180 cmp w1, w2
183 mov w2, #PRR_PRODUCT_E3
184 cmp w1, w2
[all …]
/rk3399_ARM-atf/lib/locks/exclusive/aarch64/
H A Dspinlock.S
/rk3399_ARM-atf/drivers/marvell/uart/
H A Da3700_console.S45 cbz w2, init_fail
94 lsl w2, w2, #4
95 add w1, w1, w2, lsr #1
96 udiv w2, w1, w2
97 and w2, w2, #0x3ff /* clear all other bits to use default clock */
99 str w2, [x0, #UART_BAUD_REG]/* set baud rate divisor */
167 1: ldr w2, [x1, #UART_STATUS_REG]
168 and w2, w2, #UARTLSR_TXFIFOFULL
169 cmp w2, #UARTLSR_TXFIFOFULL
171 mov w2, #0xD /* '\r' */
[all …]
/rk3399_ARM-atf/plat/qti/msm8916/aarch64/
H A Duartdm_console.S74 mov w2, #65536
78 subs w2, w2, #1
134 ldr w2, [x1, #UART_DM_SR]
135 tbz w2, #UART_DM_SR_TXRDY_BIT, 1b
138 mov w2, #'\r'
139 str w2, [x1, #UART_DM_TF]
142 ldr w2, [x1, #UART_DM_SR]
143 tbz w2, #UART_DM_SR_TXRDY_BIT, 2b
176 ldr w2, [x1, #UART_DM_SR]
177 tbz w2, #UART_DM_SR_TXEMT_BIT, 1b
/rk3399_ARM-atf/plat/nvidia/tegra/drivers/spe/
H A Dshared_console.S102 mov w2, #0xD /* '\r' */
103 and w2, w2, #0xFF
105 orr w2, w2, w3
106 str w2, [x1]
112 mov w2, w0
113 and w2, w2, #0xFF
115 orr w2, w2, w3
116 str w2, [x1]
/rk3399_ARM-atf/drivers/cadence/uart/aarch64/
H A Dcdns_console.S109 ldr w2, [x1, #R_UART_SR]
110 tbz w2, #UART_SR_INTR_TEMPTY_BIT, 1b
111 mov w2, #0xD
112 str w2, [x1, #R_UART_TX]
115 ldr w2, [x1, #R_UART_SR]
116 tbz w2, #UART_SR_INTR_TEMPTY_BIT, 2b
202 ldr w2, [x0, #R_UART_SR]
203 tbz w2, #UART_SR_INTR_TEMPTY_BIT, check_txfifo_empty
206 ldr w2, [x0, #R_UART_SR]
207 tbnz w2, #UART_SR_INTR_TACTIVE_BIT, check_tx_inactive_state
/rk3399_ARM-atf/drivers/arm/pl011/aarch64/
H A Dpl011_console.S45 cbz w2, core_init_fail
54 udiv w2, w1, w2
56 lsr w1, w2, #6
60 and w1, w2, #0x3f
133 ldr w2, [x1, #UARTFR]
134 tbnz w2, #PL011_UARTFR_TXFF_BIT, 1b
135 mov w2, #0xD
136 str w2, [x1, #UARTDR]
139 ldr w2, [x1, #UARTFR]
140 tbnz w2, #PL011_UARTFR_TXFF_BIT, 2b
/rk3399_ARM-atf/plat/nxp/common/aarch64/
H A Dls_helpers.S96 mov w2, wzr
101 bfxil w2, w0, #0, #8
108 cmp w2, #CORES_PER_CLUSTER
113 add w1, w1, w2
114 mov w2, #0x1
115 lsl w0, w2, w1
138 mov w2, wzr
140 bfxil w2, w0, #0, #8 /* extract cpu # */
147 cmp w2, #CORES_PER_CLUSTER
152 add w0, w1, w2
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/aarch64/
H A Dls1046a.S93 rbit w2, w0
100 rev w3, w2
106 ldr w2, [x1, #DCFG_BRR_OFFSET]
107 rev w3, w2
109 rev w2, w3
110 str w2, [x1, #DCFG_BRR_OFFSET]
136 rev w2, w3
137 str w2, [x1, #RCPM_PCPH20CLRR_OFFSET]
186 rev w2, w1
189 and w0, w2, w0
[all …]
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/
H A Dplat_pmu_macros.S97 and w2, w1, #DDRC0_SREF_DONE_EXT
99 orr w2, w2, w3
100 cmp w2, #(DDRC0_SREF_DONE_EXT | DDRC1_SREF_DONE_EXT)
124 and w2, w1, #DDRC0_SREF_DONE_EXT
126 orr w2, w2, w3
127 cmp w2, #0x0
/rk3399_ARM-atf/lib/libc/aarch64/
H A Dmemset.S49 less_64:tbz w2, #5, less_32 /* < 32 bytes */
52 less_32:tbz w2, #4, less_16 /* < 16 bytes */
54 less_16:tbz w2, #3, less_8 /* < 8 bytes */
56 less_8: tbz w2, #2, less_4 /* < 4 bytes */
58 less_4: tbz w2, #1, less_2 /* < 2 bytes */
60 less_2: tbz w2, #0, exit
/rk3399_ARM-atf/drivers/arm/css/sds/aarch64/
H A Dsds_helpers.S23 mov w2, #SDS_REGION_SIGNATURE
27 cmp w2, w1, uxth
38 ldrh w2, [x0]
39 cmp w2, #SDS_AP_CPU_INFO_STRUCT_ID
52 ldr w2, [x0,#4]
/rk3399_ARM-atf/plat/imx/common/
H A Dlpuart_console.S49 ldr w2, [x1, #STAT]
50 tbz w2, #23, 1b
51 mov w2, #0xD
52 str w2, [x1, #DATA]
55 ldr w2, [x1, #STAT]
56 tbz w2, #23, 2b
H A Dimx_uart_console.S56 ldr w2, [x1, #UTS]
57 tbnz w2, #4, 1b
58 mov w2, #0xD
59 str w2, [x1, #UTXD]
62 ldr w2, [x1, #UTS]
63 tbnz w2, #4, 2b
/rk3399_ARM-atf/drivers/st/uart/aarch64/
H A Dstm32_console.S61 cbz w2, core_init_fail
77 lsr w3, w2, #1
79 udiv w3, w3, w2
84 lsr w3, w2, #1
86 udiv w3, w3, w2
102 mov w2, #USART_TIMEOUT
104 subs w2, w2, #1
169 ldr w2, [x1, #USART_ISR]
170 tst w2, #USART_ISR_TXE
/rk3399_ARM-atf/drivers/coreboot/cbmem_console/aarch64/
H A Dcbmem_console.S39 ldr w2, [x0]
40 str w2, [x1, #CONSOLE_T_CBMC_SIZE]
56 ldr w2, [x1, #CONSOLE_T_CBMC_SIZE]
64 cmp w16, w2 /* sanity check that cursor < size */
72 cmp w16, w2 /* if cursor < size... */
/rk3399_ARM-atf/plat/arm/board/fvp/aarch64/
H A Dfvp_helpers.S110 str w2, [x1, #PSYSR_OFF]
111 ldr w2, [x1, #PSYSR_OFF]
112 ubfx w2, w2, #PSYSR_WK_SHIFT, #PSYSR_WK_WIDTH
113 cmp w2, #WKUP_PPONR
115 cmp w2, #WKUP_GICREQ
/rk3399_ARM-atf/drivers/amlogic/console/aarch64/
H A Dmeson_console.S98 cmp w2, #0
103 udiv w3, w3, w2
168 1: ldr w2, [x1, #MESON_STATUS_OFFSET]
169 tbnz w2, #MESON_STATUS_TX_FULL_BIT, 1b
171 mov w2, #0xD
172 str w2, [x1, #MESON_WFIFO_OFFSET]
174 2: ldr w2, [x1, #MESON_STATUS_OFFSET]
175 tbnz w2, #MESON_STATUS_TX_FULL_BIT, 2b
/rk3399_ARM-atf/plat/nxp/soc-ls1043a/aarch64/
H A Dls1043a.S122 mov w2, w0
123 CoreMaskMsb w2, w3
130 rev w3, w2
136 ldr w2, [x1, #DCFG_BRR_OFFSET]
137 rev w3, w2
139 rev w2, w3
140 str w2, [x1, #DCFG_BRR_OFFSET]
206 rev w2, w1
209 and w0, w2, w0
551 rev w2, w1
[all …]

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