| /rk3399_ARM-atf/plat/marvell/octeontx/otx2/t91/t9130/board/ |
| H A D | dram_port.c | 35 .tm = {
113 return &ptr_iface->tm; in mv_ddr_topology_map_get()
140 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in plat_marvell_dram_update_topology() local
144 if (tm->cfg_src == MV_DDR_CFG_SPD) { in plat_marvell_dram_update_topology()
152 i2c_write(I2C_SPD_P0_ADDR, 0x0, 1, tm->spd_data.all_bytes, 0); in plat_marvell_dram_update_topology()
155 i2c_read(I2C_SPD_ADDR, 0x0, 1, tm->spd_data.all_bytes, in plat_marvell_dram_update_topology()
156 sizeof(tm->spd_data.all_bytes)); in plat_marvell_dram_update_topology()
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| /rk3399_ARM-atf/plat/marvell/armada/a8k/a80x0_mcbin/board/ |
| H A D | dram_port.c | 116 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in plat_marvell_dram_update_topology() local
120 if (tm->cfg_src == MV_DDR_CFG_SPD) { in plat_marvell_dram_update_topology()
126 i2c_write(I2C_SPD_P0_ADDR, 0x0, 1, tm->spd_data.all_bytes, 0); in plat_marvell_dram_update_topology()
128 i2c_read(I2C_SPD_ADDR, 0x0, 1, tm->spd_data.all_bytes, in plat_marvell_dram_update_topology()
129 sizeof(tm->spd_data.all_bytes)); in plat_marvell_dram_update_topology()
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| /rk3399_ARM-atf/plat/marvell/armada/a8k/a80x0/board/ |
| H A D | dram_port.c | 129 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in plat_marvell_dram_update_topology() local
133 if (tm->cfg_src == MV_DDR_CFG_SPD) { in plat_marvell_dram_update_topology()
141 i2c_write(I2C_SPD_P0_ADDR, 0x0, 1, tm->spd_data.all_bytes, 0); in plat_marvell_dram_update_topology()
144 i2c_read(I2C_SPD_ADDR, 0x0, 1, tm->spd_data.all_bytes, in plat_marvell_dram_update_topology()
145 sizeof(tm->spd_data.all_bytes)); in plat_marvell_dram_update_topology()
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| /rk3399_ARM-atf/plat/marvell/armada/a8k/a80x0_puzzle/board/ |
| H A D | dram_port.c | 125 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in plat_marvell_dram_update_topology() local
129 if (tm->cfg_src == MV_DDR_CFG_SPD) { in plat_marvell_dram_update_topology()
135 i2c_write(I2C_SPD_P0_ADDR, 0x0, 1, tm->spd_data.all_bytes, 0); in plat_marvell_dram_update_topology()
137 i2c_read(I2C_SPD_ADDR, 0x0, 1, tm->spd_data.all_bytes, in plat_marvell_dram_update_topology()
138 sizeof(tm->spd_data.all_bytes)); in plat_marvell_dram_update_topology()
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/ |
| H A D | mt_spm.h | 22 #define MT_SPM_TIME_GET(tm) ({ (tm) = el3_uptime(); }) argument
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| /rk3399_ARM-atf/include/drivers/brcm/ |
| H A D | fru.h | 120 void fru_format_time(unsigned int min, struct fru_time *tm);
139 static inline void fru_format_time(unsigned int min, struct fru_time *tm) in fru_format_time() argument
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/ |
| H A D | mt_spm.h | 22 #define MT_SPM_TIME_GET(tm) ({ (tm) = el3_uptime(); }) argument
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| /rk3399_ARM-atf/include/drivers/arm/ |
| H A D | gicv5.h | 171 .tm = (_tm), \
180 uint8_t tm:1; member
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| /rk3399_ARM-atf/drivers/arm/gicv5/ |
| H A D | gicv5_main.c | 63 write_iwb_wtmr(base_addr, reg_index, val | wire.tm << reg_offset); in iwb_configure_wtmr()
137 write_irs_spi_cfgr(base_addr, config->spis[i].tm); in irs_enable()
|