1 /* 2 * Copyright (c) 2025, Mediatek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef MT_SPM_H 8 #define MT_SPM_H 9 10 #include <stdint.h> 11 #include <stdio.h> 12 13 #include <lib/pm/mtk_pm.h> 14 #include <lpm_v2/mt_lp_rq.h> 15 #include <mt_spm_common_v1.h> 16 17 #define CLK_SCP_CFG_0 (CKSYS_BASE + 0x200) 18 #define CLK_SCP_CFG_1 (CKSYS_BASE + 0x210) 19 #define INFRA_BUS_DCM_CTRL (INFRACFG_AO_BASE + 0x070) 20 #define RG_AXI_DCM_DIS_EN BIT(21) 21 #define RG_PLLCK_SEL_NO_SPM BIT(22) 22 #define MT_SPM_TIME_GET(tm) ({ (tm) = el3_uptime(); }) 23 #define SPM_FW_NO_RESUME 1 24 #define MCUSYS_MTCMOS_ON 0 25 #define WAKEUP_LOG_ON 0 26 #define PMIC_ONLV 1 27 28 #define MT_SPM_USING_SRCLKEN_RC 29 /* SPM extern operand definition */ 30 #define MT_SPM_EX_OP_CLR_26M_RECORD BIT(0) 31 #define MT_SPM_EX_OP_SET_WDT BIT(1) 32 #define MT_SPM_EX_OP_NON_GENERIC_RESOURCE_REQ BIT(2) 33 #define MT_SPM_EX_OP_SET_SUSPEND_MODE BIT(3) 34 #define MT_SPM_EX_OP_SET_IS_ADSP BIT(4) 35 #define MT_SPM_EX_OP_SRCLKEN_RC_BBLPM BIT(5) 36 #define MT_SPM_EX_OP_HW_S1_DETECT BIT(6) 37 #define MT_SPM_EX_OP_TRACE_LP BIT(7) 38 #define MT_SPM_EX_OP_TRACE_SUSPEND BIT(8) 39 #define MT_SPM_EX_OP_TRACE_TIMESTAMP_EN BIT(9) 40 #define MT_SPM_EX_OP_TIME_CHECK BIT(10) 41 #define MT_SPM_EX_OP_TIME_OBS BIT(11) 42 #define MT_SPM_EX_OP_SET_IS_USB_HEADSET BIT(12) 43 #define MT_SPM_EX_OP_SET_IS_FM_AUDIO BIT(13) 44 #define MT_SPM_EX_OP_DEVICES_SAVE BIT(14) 45 #define MT_SPM_EX_OP_DISABLE_VCORE_LP BIT(15) 46 47 #define MT_BUS26M_EXT_LP_26M_ON_MODE \ 48 (MT_SPM_EX_OP_SET_IS_ADSP | MT_SPM_EX_OP_SET_IS_FM_AUDIO) 49 50 #define MT_VCORE_EXT_LP_VCORE_ON_MODE \ 51 (MT_SPM_EX_OP_SET_IS_ADSP | MT_SPM_EX_OP_SET_IS_USB_HEADSET | \ 52 MT_SPM_EX_OP_SET_IS_FM_AUDIO) 53 54 /* EN SPM INFRA DEBUG OUT */ 55 #define DEBUGSYS_DEBUG_EN_REG (DBGSYS_DEM_BASE + 0x94) 56 57 /* INFRA_AO_DEBUG_CON */ 58 #define INFRA_AO_DBG_CON0 (INFRACFG_AO_BASE + 0x500) 59 #define INFRA_AO_DBG_CON1 (INFRACFG_AO_BASE + 0x504) 60 #define INFRA_AO_DBG_CON2 (INFRACFG_AO_BASE + 0x508) 61 #define INFRA_AO_DBG_CON3 (INFRACFG_AO_BASE + 0x50C) 62 63 #endif /* MT_SPM_H */ 64