| /rk3399_ARM-atf/plat/mediatek/common/lpm_v2/ |
| H A D | mt_lp_rq.c | 30 static int mt_lp_resource_update_and_set(struct mt_lp_resource_user *this);
32 static int mt_lp_resource_request(struct mt_lp_resource_user *this, in mt_lp_resource_request() argument
39 if ((this == NULL) || (resource == 0) || (resource > MT_LP_RQ_ALL)) { in mt_lp_resource_request()
49 rs[i]->res_usage |= this->umask; in mt_lp_resource_request()
55 ret = mt_lp_resource_update_and_set(this); in mt_lp_resource_request()
60 static int mt_lp_resource_release(struct mt_lp_resource_user *this) in mt_lp_resource_release() argument
66 if (this == NULL) in mt_lp_resource_release()
73 rs[i]->res_usage &= ~(this->umask); in mt_lp_resource_release()
78 ret = mt_lp_resource_update_and_set(this); in mt_lp_resource_release()
223 static int mt_lp_resource_update_and_set(struct mt_lp_resource_user *this) in mt_lp_resource_update_and_set() argument
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| /rk3399_ARM-atf/plat/mediatek/include/lpm/ |
| H A D | mt_lp_rq.h | 24 int (*request)(struct mt_lp_resource_user *this, unsigned int resource);
26 int (*release)(struct mt_lp_resource_user *this);
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| /rk3399_ARM-atf/docs/ |
| H A D | license.rst | 5 this project are accepted under the same license with developer sign-off as
15 - Redistributions of source code must retain the above copyright notice, this
19 this list of conditions and the following disclaimer in the documentation
23 endorse or promote products derived from this software without specific
61 (GPL-2.0+ OR BSD-2-Clause). It is used by this project under the terms of
62 the BSD-2-Clause license. Any contributions to this code must be made under
66 (NCSA OR MIT). It is used by this project under the terms of the NCSA
69 contributions to this code must be made under the terms of both licenses.
75 (GPL-2.0+ OR BSD-3-Clause). It is used by this project under the terms of the
76 BSD-3-Clause license. Any contributions to this code must be made under the
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| H A D | porting-guide.rst | 27 then, you will find references to *weak* functions in this document.
65 provided to help in this setup.
67 Note that although this library supports non-identity mappings, this is intended
111 Each platform must ensure that a header file of this name is in the system
171 states for each level may be sparsely allocated between 0 and this value
172 with 0 being reserved for the RUN state. The PSCI implementation uses this
187 that the platform supports. The default value of this macro is 2 since
190 account for more local power states, then it must redefine this macro.
192 Currently, this macro is used by the Generic PSCI implementation to size
348 TF-A does not provide source code for this image.
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| /rk3399_ARM-atf/plat/mediatek/include/lpm_v2/ |
| H A D | mt_lp_rq.h | 27 int (*request)(struct mt_lp_resource_user *this, unsigned int res);
29 int (*release)(struct mt_lp_resource_user *this);
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| /rk3399_ARM-atf/plat/mediatek/common/lpm/ |
| H A D | mt_lp_rq.c | 27 static int mt_lp_resource_request(struct mt_lp_resource_user *this, unsigned int resource) in mt_lp_resource_request() argument
32 if ((this == NULL) || (resource == 0) || (resource > MT_LP_RQ_ALL)) { in mt_lp_resource_request()
42 rs[i]->res_usage |= this->umask; in mt_lp_resource_request()
52 static int mt_lp_resource_release(struct mt_lp_resource_user *this) in mt_lp_resource_release() argument
57 if (this == NULL) { in mt_lp_resource_release()
65 rs[i]->res_usage &= ~(this->umask); in mt_lp_resource_release()
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| /rk3399_ARM-atf/docs/security_advisories/ |
| H A D | security-advisory-tfv-7.rst | 36 interfaces into the secure world with attacker-controlled inputs. However, this
56 For affected CPUs, this approach enables the mitigation during EL3
63 TF-A implements this approach for the following affected CPUs:
77 For affected CPUs, this approach also enables the mitigation during EL3
78 initialization, following every PE reset. In addition, this approach implements
83 on exit from EL3. For more information on this approach, see `Firmware
88 However, even without any mitigation code in other software components, this
92 Since the expectation in this approach is that more software executes with the
93 mitigation disabled, this may result in better system performance than the
95 use-cases, this performance saving may be outweighed by the additional overhead
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| H A D | security-advisory-tfv-8.rst | 57 In the presence of multiple normal world SMC clients, this behaviour might leak
67 For this reason, TF-A does not save ``x0`` to ``x3`` in the CPU context on an
68 SMC synchronous exception. It has behaved this way since the first version.
70 We can confirm that at least upstream KVM-based systems mitigate this threat,
71 and are therefore unaffected by this issue. Other EL2 software should be audited
72 to assess the impact of this threat.
74 EL2 software might find mitigating this threat somewhat onerous, because for all
76 it can sanitise any unused return registers. On the other hand, mitigating this
81 Note that AArch32 TF-A is not affected by this issue. The SMC handling code in
93 * Additionally, also save the 'pmcr' register as this is updated whilst
|
| H A D | security-advisory-tfv-2.rst | 27 Trusted Firmware (TF) unconditionally assign this bit to ``0`` in the early
30 Given that TF does not currently contain support for this feature (for example,
31 by saving and restoring the appropriate debug registers), this may allow a
37 Earlier versions of TF (prior to `commit 495f3d3`_) did not assign this bit.
44 interface. Therefore this issue only exists for AArch32 Secure EL1 code when
52 Finally, this also issue applies to AArch32 platforms that use the TF SP_MIN
|
| H A D | security-advisory-tfv-6.rst | 46 achieve this.
48 For Cortex-A57 and Cortex-A72 CPUs, the Pull Requests (PRs) in this advisory
52 For Cortex-A73 and Cortex-A75 CPUs, the PRs in this advisory invalidate the
61 on the PRs in this advisory being deployed in order for those workarounds to
72 the normal world to discover the presence of this firmware service.
82 with MMU disabled that this workaround entails effectively does invalidate the
83 branch predictor. Hence this is a reasonable comparison.
90 | ``PSCI_VERSION`` baseline (without PRs in this advisory) | 515 |
92 | ``PSCI_VERSION`` baseline (with PRs in this advisory) | 527 |
103 Due to the high severity and wide applicability of this issue, the above
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| /rk3399_ARM-atf/docs/threat_model/firmware_threat_model/ |
| H A D | threat_model_fw_update_and_recovery.rst | 13 Model` in a number of places, as some of the contents are applicable to this
19 In this threat model, the target of evaluation is the Trusted Firmware for
26 For this section, please reference the Threat Assessment under the
36 of this threat model. Only additional details are pointed out.
67 in trial run or accepted run. The attacker tries to manipulate this field,
71 By design, no software mitigations exist to prevent this. The safeguarding
73 attacks on it, if this is a concern in the platform's threat model.
85 of this threat model. Only additional details are pointed out.
|
| H A D | threat_model_rse_interface.rst | 14 The scope of this threat model only includes the interface between the RSE and
43 For this section, please reference the Threat Assessment under the general TF-A
48 allowed only for firmware running at EL3. Accidentally exposing this
53 mitigates against this by clearing its internal buffer when reply is
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| /rk3399_ARM-atf/lib/compiler-rt/ |
| H A D | LICENSE.TXT | 6 "BSD-Like" license and the MIT license. As a user of this code you may choose
30 this software and associated documentation files (the "Software"), to deal with
37 this list of conditions and the following disclaimers.
40 this list of conditions and the following disclaimers in the
45 endorse or promote products derived from this Software without specific
61 of this software and associated documentation files (the "Software"), to deal
67 The above copyright notice and this permission notice shall be included in
89 University of Illinois to endorse or promote products derived from this
|
| /rk3399_ARM-atf/ |
| H A D | dco.txt | 9 Everyone is permitted to copy and distribute verbatim copies of this
15 By making a contribution to this project, I certify that:
33 (d) I understand and agree that this project and the contribution
37 this project or the open source license(s) involved.
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | reset-design.rst | 6 integrator can tailor this code to the system configuration to some extent,
17 diagram illustrates this:
29 this case. Please refer to section 6 "Using BL31 entrypoint as the reset
47 To enable this boot flow, compile TF-A with ``PROGRAMMABLE_RESET_ADDRESS=1``.
69 To enable this boot flow, compile TF-A with ``COLD_BOOT_SINGLE_CPU=1``. This
87 To enable this boot flow, compile TF-A with both ``COLD_BOOT_SINGLE_CPU=1``
97 processor. For this type of SoC it is desirable for the application processor
101 logic in the BL31 entry point to support this use case.
103 In this configuration, the platform's Trusted Boot Firmware must ensure that
117 SRAM and all CPU reset vectors be changed from the default ``0x0`` to this run
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| /rk3399_ARM-atf/docs/plat/arm/arm_fpga/ |
| H A D | index.rst | 7 this port ignores any power management features of the platform.
15 As a result this port is a fairly generic BL31-only port, which can serve
18 The aim of this port is to support as many FPGA images as possible with
23 across the various images, this is detected at runtime by BL31.
32 internal list, but for new or experimental cores this creates a lot of
33 churn. With this option, the code will fall back to some basic CPU support
35 Default value of this flag is 1.
38 It must have been loaded into DRAM already, typically this is done by
87 components at their respective load addresses. In addition to this file
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| /rk3399_ARM-atf/docs/plat/ |
| H A D | rpi4.rst | 5 Arm Cortex-A72 cores. Also in contrast to previous Raspberry Pi versions this
10 as well, but have not been tested at this point.
20 There are no real configuration options at this point, so there is only
31 arm64 Linux kernels are known to work this way.
54 In contrast to the existing Raspberry Pi 3 port this one here is a BL31-only
66 To accommodate this existing way of configuring and setting up the board,
67 we use as much of this workflow as possible.
70 load this file to the beginning of DRAM (address 0) and execute it in
84 could ignore this address as well.
|
| H A D | synquacer.rst | 5 Cortex-A53. The Developerbox, of 96boards, is a platform that contains this
6 processor. This port of the Trusted Firmware only supports this platform at
44 - Secondly, create a new working directory and store the absolute path to this
46 this directory is created but as an example:
96 any version of gcc >= 5 will support this feature and may be used to build EDK2.
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| /rk3399_ARM-atf/docs/components/ |
| H A D | ffa-manifest-binding.rst | 17 by this node. The minor number is incremented if the binding changes in a
20 - X is an integer representing the major version number of this document.
21 - Y is an integer representing the minor version number of this document.
36 identifying the UUID of the services implemented by this partition.
59 - In the absence of virtualization, this is the number of execution
61 - If value of this field = 1 and number of PEs > 1 then the partition is
63 - If the value of this field > 1 then the partition is treated as a MP
83 - Physical base address of the partition in memory. Absence of this field
90 the partition. Absence of this field indicates that the entry point is at
103 - A unique number amongst all partitions that specifies if this partition
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| H A D | xlat-tables-lib-v2-design.rst | 10 More specifically, some use cases that this library aims to support are:
43 From this point onwards, this document will implicitly refer to version 2 of the
89 potentially less memory. However, if part of this 2MB region is later remapped
93 modified to point to this new level-3 table. This has a performance cost at
97 then they might enforce a 4KB mapping granularity for this 2MB region from the
102 library will choose the mapping granularity for this region as it sees fit (more
128 The resulting translation context variable will be called after this name, to
138 Number of translation tables to statically allocate for this context,
140 allocated. For example, if the initial lookup level is 1, this parameter would
142 for this context.
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| H A D | rmm-el3-comms-spec.rst | 5 There are two parts in this interface: the boot interface and the runtime
99 …x0,Linear index of this PE. This index starts from 0 and must be less than the maximum number of C…
100 x1,Version for this Boot Interface as defined in :ref:`rmm_el3_ifc_versioning`.
101 …x2,Maximum number of CPUs to be supported at runtime. RMM should ensure that it can support this m…
102 …be of 4KB size (1 page). The Boot Manifest must be present at the base of this shared buffer durin…
103 …tion, the activation token should be set to the value returned by RMM for this CPU during the init…
108 Normal memory attributes (IWB-OWB-ISH) at EL3. At boot, this memory will be
113 EL3 should also ensure that this shared buffer is always available for use by RMM
116 service commands in EL3, this buffer can be used to exchange data between RMM
118 utilizing this buffer during the boot phase, prior to return back to EL3 via
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| /rk3399_ARM-atf/licenses/ |
| H A D | LICENSE-APACHE-2.0.txt | 11 and distribution as defined by Sections 1 through 9 of this document.
18 control with that entity. For the purposes of this definition,
25 exercising permissions granted by this License.
45 of this License, Derivative Works shall not include works that remain
54 the copyright owner. For the purposes of this definition, "submitted"
68 this License, each Contributor hereby grants to You a perpetual,
75 this License, each Contributor hereby grants to You a perpetual,
77 (except as stated in this section) patent license to make, have made,
87 granted to You under this License for that Work shall terminate
96 Derivative Works a copy of this License; and
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| /rk3399_ARM-atf/docs/design_documents/ |
| H A D | measured_boot.rst | 88 TCG has specified the architecture for the structure of this log in the
105 this document :ref:`Runtime Security Engine (RSE)` for more details.
134 somewhere, or panicking the system if this is considered a fatal error.
138 - In BL1, this function is used to initialize the Event Log backend
141 - In BL2, this function is used to initialize the Event Log buffer with
163 - On the Arm FVP port, this function measures the given image and then
183 system if this is considered a fatal error.
187 - In BL1, this function is used to pass the base address of
191 - In BL2, this function is used to pass the Event Log buffer information
214 using the backend via this interface.
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| H A D | cmake_framework.rst | 14 and as part of this a reusable CMake framework for embedded projects.
20 to use CMake language for the new buildsystem. The main reasons of this decision
41 tasks, wrap CMake functions, etc. Since this functionality can be useful in
43 reusable framework and store this in a separate repository. The following
56 this.
59 macros, etc. in a structured way. It contains two utilities for this purpose:
93 and/or built by the framework. For this, the CMake find_package functionality is
110 supported). After this we run the selected build tool which in turn calls the
114 Usually during development only the steps in this second phase have to be
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| /rk3399_ARM-atf/docs/getting_started/ |
| H A D | build-options.rst | 27 memory-mapped debug accesses are unaffected by this control.
56 image for the ``fip`` target. In this case, the BL2 in the TF-A will not be
60 BL2U image. In this case, the BL2U in TF-A will not be built.
77 enable this use-case. For now, this option is only supported
81 BL31 image for the ``fip`` target. In this case, the BL31 in TF-A will not
89 BL32 image for the ``fip`` target. In this case, the BL32 in TF-A will not
148 irrespective of the value of this option if the CPU supports it.
170 to be implemented in this case.
178 this is only enabled for a debug build of the firmware.
212 of the value of this flag if the CPU supports it. Alternatively, when
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