Lines Matching refs:this

46 achieve this.
48 For Cortex-A57 and Cortex-A72 CPUs, the Pull Requests (PRs) in this advisory
52 For Cortex-A73 and Cortex-A75 CPUs, the PRs in this advisory invalidate the
61 on the PRs in this advisory being deployed in order for those workarounds to
72 the normal world to discover the presence of this firmware service.
82 with MMU disabled that this workaround entails effectively does invalidate the
83 branch predictor. Hence this is a reasonable comparison.
90 | ``PSCI_VERSION`` baseline (without PRs in this advisory)         | 515       |
92 | ``PSCI_VERSION`` baseline (with PRs in this advisory)            | 527       |
103 Due to the high severity and wide applicability of this issue, the above
131 translation regime, for example between EL0 and EL1, therefore this variant
141 In general, it is not believed that software mitigations for this issue are necessary.
145 Refer to :ref:`security-advisory-tfv-7` for further details on this variant.
149 Refer to :ref:`security-advisory-tfv-9` for further details on this variant.