| /rk3399_ARM-atf/drivers/renesas/rzg/board/ |
| H A D | board.c | 50 void rzg_get_board_type(uint32_t *type, uint32_t *rev) in rzg_get_board_type() argument
72 *rev = 0; in rzg_get_board_type()
79 *rev = 0x30U; in rzg_get_board_type()
81 *rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)]; in rzg_get_board_type()
85 *rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)]; in rzg_get_board_type()
89 *rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)]; in rzg_get_board_type()
92 *rev = (((boardInfo & GP5_19_BIT) >> 14) | in rzg_get_board_type()
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| H A D | board.h | 31 void rzg_get_board_type(uint32_t *type, uint32_t *rev);
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| /rk3399_ARM-atf/plat/rpi/rpi3/ |
| H A D | rpi3_bl1_setup.c | 94 uint32_t __unused rev; in bl1_platform_setup() local
104 rc = rpi3_vc_hardware_get_board_revision(&rev); in bl1_platform_setup()
109 switch (rev) { in bl1_platform_setup()
125 ERROR("rpi3: Unknown board revision 0x%08x\n", rev); in bl1_platform_setup()
129 NOTICE("rpi3: Detected: %s %s [0x%08x]\n", model, info, rev); in bl1_platform_setup()
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| /rk3399_ARM-atf/plat/arm/board/juno/aarch32/ |
| H A D | juno_helpers.S | 19 #define JUNO_REVISION(rev) REV_JUNO_R##rev argument
20 #define JUNO_HANDLER(rev) plat_reset_handler_juno_r##rev argument
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| /rk3399_ARM-atf/plat/nxp/soc-ls1043a/aarch64/ |
| H A D | ls1043a.S | 130 rev w3, w2
137 rev w3, w2
139 rev w2, w3
206 rev w2, w1
231 rev w0, w1
551 rev w2, w1
554 rev w1, w2
758 rev w3, w1
763 rev w3, w1
1229 rev w2, w1
[all …]
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| /rk3399_ARM-atf/plat/arm/board/tc/include/ |
| H A D | tc_helpers.S | 14 #define TC_HANDLER(rev) plat_reset_handler_tc##rev argument
15 #define PLAT_RESET_HANDLER(rev) TC_HANDLER(rev) argument
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| /rk3399_ARM-atf/drivers/renesas/rcar/board/ |
| H A D | board.c | 56 int32_t rcar_get_board_type(uint32_t *type, uint32_t *rev) in rcar_get_board_type() argument
94 *rev = 0; in rcar_get_board_type()
98 *rev = board_tbl[*type][(uint8_t) (board_id & BOARD_REV_MASK)]; in rcar_get_board_type()
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| H A D | board.h | 35 int32_t rcar_get_board_type(uint32_t *type, uint32_t *rev);
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| /rk3399_ARM-atf/plat/arm/board/juno/aarch64/ |
| H A D | juno_helpers.S | 23 #define JUNO_REVISION(rev) REV_JUNO_R##rev argument
24 #define JUNO_HANDLER(rev) plat_reset_handler_juno_r##rev argument
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| /rk3399_ARM-atf/plat/nxp/soc-ls1046a/aarch64/ |
| H A D | ls1046a.S | 101 rev w3, w2
108 rev w3, w2
110 rev w2, w3
137 rev w2, w3
187 rev w2, w1
210 rev w0, w1
293 rev w3, w1
308 rev w0, w1
321 rev w3, w1
336 rev w0, w1
[all …]
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| /rk3399_ARM-atf/plat/st/stm32mp2/ |
| H A D | stm32mp2_private.c | 174 static uint32_t rev; in stm32mp_get_chip_version() local
176 if (rev != 0U) { in stm32mp_get_chip_version()
177 return rev; in stm32mp_get_chip_version()
180 if (stm32_get_otp_value(REVISION_OTP, &rev) != 0) { in stm32mp_get_chip_version()
184 return rev; in stm32mp_get_chip_version()
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| /rk3399_ARM-atf/drivers/renesas/common/ddr/ddr_b/ |
| H A D | boot_init_dram_config.c | 1981 uint32_t rev = 0U; in ddr_rank_judge() local
1984 ret = rcar_get_board_type(&type, &rev); in ddr_rank_judge()
1985 if ((ret == 0) && (rev != 0xFFU)) { in ddr_rank_judge()
1987 if (rev == 0x11U) { in ddr_rank_judge()
1993 if (rev == 0x21U) { in ddr_rank_judge()
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| /rk3399_ARM-atf/drivers/arm/mhu/ |
| H A D | mhu_v2_x.c | 136 enum mhu_v2_x_supported_revisions rev) in mhu_v2_x_driver_init() argument
149 if (rev == MHU_REV_READ_FROM_HW) { in mhu_v2_x_driver_init()
173 if (rev == MHU_REV_2_0) { in mhu_v2_x_driver_init()
175 } else if (rev == MHU_REV_2_1) { in mhu_v2_x_driver_init()
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| H A D | mhu_v2_x.h | 69 enum mhu_v2_x_supported_revisions rev);
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| /rk3399_ARM-atf/.husky/ |
| H A D | commit-msg.gerrit | 179 if parent=`git rev-parse "HEAD^0" 2>/dev/null`
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| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | fvp_common.c | 373 unsigned int rev, hbi, bld, arch, sys_id; in fvp_config_setup() local
376 rev = (sys_id >> V2M_SYS_ID_REV_SHIFT) & V2M_SYS_ID_REV_MASK; in fvp_config_setup()
415 switch (rev) { in fvp_config_setup()
422 WARN("Unrecognized Foundation FVP revision %x\n", rev); in fvp_config_setup()
433 switch (rev) { in fvp_config_setup()
442 WARN("Unrecognized Base FVP revision %x\n", rev); in fvp_config_setup()
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| /rk3399_ARM-atf/plat/renesas/rzg/ |
| H A D | bl2_plat_setup.c | 651 uint32_t reg, midr, boot_dev, boot_cpu, type, rev; in bl2_early_platform_setup2() local
775 rzg_get_board_type(&type, &rev); in bl2_early_platform_setup2()
788 if (type == BOARD_UNKNOWN || rev == BOARD_REV_UNKNOWN) { in bl2_early_platform_setup2()
793 GET_BOARD_MAJOR(rev), GET_BOARD_MINOR(rev)); in bl2_early_platform_setup2()
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| /rk3399_ARM-atf/drivers/qti/accesscontrol/xpu/ |
| H A D | xpu3.c | 212 uint32_t rev; in enable_domain() local
226 rev = mmio_read_32(xpu->xpu_base_addr + XPU3_REV_OFFSET); in enable_domain()
227 rev >>= XPU3_REV_SHFT; in enable_domain()
229 if (rev > 0x3002U) { in enable_domain()
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| /rk3399_ARM-atf/include/drivers/ |
| H A D | raw_nand.h | 100 uint16_t rev; member
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| /rk3399_ARM-atf/docs/plat/ |
| H A D | rz-g2.rst | 181 NOTICE: BL2: DDR3200(rev.0.40)
184 NOTICE: BL2: QoS is default setting(rev.0.19)
218 CPU: Renesas Electronics R8A774A1 rev 1.3
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| H A D | rcar-gen3.rst | 209 NOTICE: BL2: DDR1600(rev.0.33)NOTICE: [COLD_BOOT]NOTICE: ..0
211 NOTICE: BL2: QoS is default setting(rev.0.37)
254 CPU: Renesas Electronics R8A7795 rev 1.1
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| /rk3399_ARM-atf/plat/renesas/rcar/ |
| H A D | bl2_plat_setup.c | 1026 uint32_t reg, midr, lcs, boot_dev, boot_cpu, sscg, type, rev; in bl2_early_platform_setup2() local
1158 rcar_get_board_type(&type, &rev); in bl2_early_platform_setup2()
1176 if (type == BOARD_UNKNOWN || rev == BOARD_REV_UNKNOWN) in bl2_early_platform_setup2()
1181 GET_BOARD_MAJOR(rev), GET_BOARD_MINOR(rev)); in bl2_early_platform_setup2()
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| /rk3399_ARM-atf/plat/marvell/armada/a3k/common/ |
| H A D | a3700_common.mk | 84 $(if $(shell git -C $(value WTP) rev-parse --show-cdup 2>&1),$(error "'WTP=$(value WTP)' was specif…
167 …$(if $(shell git -C $(value MV_DDR_PATH) rev-parse --show-cdup 2>&1),$(error "'MV_DDR_PATH=$(value…
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| /rk3399_ARM-atf/docs/getting_started/ |
| H A D | prerequisites.rst | 177 …curl -Lo $(git rev-parse --git-dir)/hooks/commit-msg https://review.trustedfirmware.org/tools/hook…
178 chmod +x $(git rev-parse --git-dir)/hooks/commit-msg
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| /rk3399_ARM-atf/include/plat/marvell/odyssey/csr/ |
| H A D | ody-csrs-pccbr.h | 501 uint32_t rev : 4; member
|