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Searched refs:image_base (Results 1 – 25 of 81) sorted by relevance

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/rk3399_ARM-atf/plat/nxp/common/img_loadr/
H A Dload_img.c31 int load_img(unsigned int image_id, uintptr_t *image_base, in load_img() argument
41 .image_info.image_base = *image_base - CSF_HDR_SZ, in load_img()
44 .image_info.image_base = *image_base, in load_img()
52 err = mmap_add_dynamic_region(img_info.image_info.image_base, in load_img()
53 img_info.image_info.image_base, in load_img()
71 *image_base = img_info.image_info.image_base + CSF_HDR_SZ; in load_img()
74 mmap_remove_dynamic_region(img_info.image_info.image_base, in load_img()
78 *image_base = img_info.image_info.image_base; in load_img()
/rk3399_ARM-atf/common/
H A Dimage_decompress.c37 info->image_base = decompressor_buf_base; in image_decompress_prepare()
43 uintptr_t compressed_image_base, image_base, work_base; in image_decompress() local
52 compressed_image_base = info->image_base; in image_decompress()
57 image_base = info->image_base; in image_decompress()
67 &image_base, info->image_max_size, in image_decompress()
75 info->image_size = image_base - info->image_base; in image_decompress()
77 flush_dcache_range(info->image_base, info->image_size); in image_decompress()
H A Dbl_common.c78 uintptr_t image_base; in load_image() local
86 image_base = image_data->image_base; in load_image()
104 INFO("Loading image id=%u at address 0x%lx\n", image_id, image_base); in load_image()
135 io_result = io_read(image_handle, image_base, image_size, &bytes_read); in load_image()
141 INFO("Image id=%u loaded: 0x%lx - 0x%lx\n", image_id, image_base, in load_image()
142 (uintptr_t)(image_base + image_size)); in load_image()
183 (void *)image_data->image_base, in load_auth_image_recursive()
187 zero_normalmem((void *)image_data->image_base, in load_auth_image_recursive()
189 flush_dcache_range(image_data->image_base, in load_auth_image_recursive()
249 flush_dcache_range(image_data->image_base, in load_auth_image()
/rk3399_ARM-atf/plat/arm/common/
H A Darm_dyn_cfg.c133 uintptr_t image_base; in arm_bl2_dyn_cfg_init() local
162 image_base = dtb_info->config_addr; in arm_bl2_dyn_cfg_init()
172 if (check_uptr_overflow(image_base, image_size)) { in arm_bl2_dyn_cfg_init()
182 if ((image_base >= BL31_BASE) && in arm_bl2_dyn_cfg_init()
183 (image_base <= BL31_LIMIT)) { in arm_bl2_dyn_cfg_init()
193 if (image_base < ARM_BL_RAM_BASE) { in arm_bl2_dyn_cfg_init()
206 if ((image_base >= BL32_BASE) && in arm_bl2_dyn_cfg_init()
207 (image_base <= BL32_LIMIT)) { in arm_bl2_dyn_cfg_init()
218 cfg_mem_params->image_info.image_base = image_base; in arm_bl2_dyn_cfg_init()
/rk3399_ARM-atf/lib/optee/
H A Doptee_utils.c57 init_load_addr = image_info->image_base; in parse_optee_image()
61 if (check_uptr_overflow(image_info->image_base, in parse_optee_image()
64 free_end = image_info->image_base + (image_info->image_max_size - 1); in parse_optee_image()
74 if (!((init_load_addr >= image_info->image_base) && in parse_optee_image()
79 (void *)image_info->image_base, in parse_optee_image()
80 (void *)(image_info->image_base + in parse_optee_image()
94 image_info->image_base = init_load_addr; in parse_optee_image()
186 header_ep->pc = pager_image_info->image_base; in parse_optee_header()
194 header_ep->args.arg1 = paged_image_info->image_base; in parse_optee_header()
/rk3399_ARM-atf/plat/nxp/common/setup/aarch64/
H A Dls_bl2_mem_params_desc.c42 .image_info.image_base = BL31_BASE - CSF_HDR_SZ,
46 .image_info.image_base = BL31_BASE,
68 .image_info.image_base = BL32_BASE - CSF_HDR_SZ,
72 .image_info.image_base = BL32_BASE,
89 .image_info.image_base = BL33_BASE - CSF_HDR_SZ,
93 .image_info.image_base = BL33_BASE,
/rk3399_ARM-atf/plat/hisilicon/hikey960/
H A Dhikey960_bl2_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
76 .image_info.image_base = BL31_BASE,
97 .image_info.image_base = BL32_BASE,
116 .image_info.image_base = BL32_BASE,
136 .image_info.image_base = HIKEY960_OPTEE_PAGEABLE_LOAD_BASE,
150 .image_info.image_base = DDR_SEC_CONFIG_BASE,
174 .image_info.image_base = NS_BL1U_BASE,
/rk3399_ARM-atf/plat/marvell/armada/common/aarch64/
H A Dmarvell_bl2_mem_params_desc.c33 .image_info.image_base = SCP_BL2_BASE,
77 .image_info.image_base = BL31_BASE,
98 .image_info.image_base = BL32_BASE,
117 .image_info.image_base = BL32_BASE,
137 .image_info.image_base = MARVELL_OPTEE_PAGEABLE_LOAD_BASE,
159 .image_info.image_base = MARVELL_DRAM_BASE,
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhikey_bl2_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
76 .image_info.image_base = BL31_BASE,
97 .image_info.image_base = BL32_BASE,
116 .image_info.image_base = BL32_BASE,
136 .image_info.image_base = HIKEY_OPTEE_PAGEABLE_LOAD_BASE,
158 .image_info.image_base = HIKEY_NS_IMAGE_OFFSET,
/rk3399_ARM-atf/plat/hisilicon/poplar/
H A Dbl2_plat_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
76 .image_info.image_base = BL31_BASE,
97 .image_info.image_base = BL32_BASE,
116 .image_info.image_base = BL32_BASE,
136 .image_info.image_base = POPLAR_OPTEE_PAGEABLE_LOAD_BASE,
158 .image_info.image_base = PLAT_POPLAR_NS_IMAGE_OFFSET,
/rk3399_ARM-atf/plat/socionext/uniphier/
H A Duniphier_image_desc.c28 .image_info.image_base = UNIPHIER_SCP_OFFSET,
42 .image_info.image_base = UNIPHIER_BL31_OFFSET,
64 .image_info.image_base = UNIPHIER_BL32_OFFSET,
82 .image_info.image_base = UNIPHIER_BL33_OFFSET,
107 uniphier_image_descs[i].image_info.image_base += mem_base; in REGISTER_BL_IMAGE_DESCS()
/rk3399_ARM-atf/plat/rpi/rpi3/aarch64/
H A Drpi3_bl2_mem_params_desc.c39 .image_info.image_base = BL31_BASE,
61 .image_info.image_base = BL32_BASE,
82 .image_info.image_base = BL32_BASE,
104 .image_info.image_base = RPI3_OPTEE_PAGEABLE_LOAD_BASE,
128 .image_info.image_base = PLAT_RPI3_NS_IMAGE_OFFSET,
/rk3399_ARM-atf/plat/qemu/common/
H A Dqemu_bl2_mem_params_desc.c65 .image_info.image_base = BL31_BASE,
86 .image_info.image_base = RMM_BASE,
112 .image_info.image_base = BL32_BASE,
134 .image_info.image_base = BL32_BASE,
153 .image_info.image_base = QEMU_OPTEE_PAGEABLE_LOAD_BASE,
167 .image_info.image_base = TOS_FW_CONFIG_BASE,
181 .image_info.image_base = TB_FW_CONFIG_BASE,
216 .image_info.image_base = NS_IMAGE_OFFSET,
/rk3399_ARM-atf/plat/arm/common/aarch64/
H A Darm_bl2_mem_params_desc.c31 .image_info.image_base = SCP_BL2_BASE,
75 .image_info.image_base = BL31_BASE,
115 .image_info.image_base = RMM_BASE,
132 .image_info.image_base = BL32_BASE,
155 .image_info.image_base = BL32_BASE,
175 .image_info.image_base = ARM_OPTEE_PAGEABLE_LOAD_BASE,
207 .image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
231 .image_info.image_base = ETHOSN_NPU_FW_IMAGE_BASE,
/rk3399_ARM-atf/plat/brcm/common/
H A Dbrcm_bl2_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
55 .image_info.image_base = BL31_BASE,
76 .image_info.image_base = BL32_BASE,
98 .image_info.image_base = PLAT_BRCM_NS_IMAGE_OFFSET,
/rk3399_ARM-atf/plat/arm/board/corstone1000/common/
H A Dcorstone1000_bl2_mem_params_desc.c34 .image_info.image_base = BL31_BASE,
55 .image_info.image_base = BL32_BASE,
64 .image_info.image_base = CORSTONE1000_TOS_FW_CONFIG_BASE,
84 .image_info.image_base = BL33_BASE,
/rk3399_ARM-atf/plat/intel/soc/common/
H A Dbl2_plat_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
73 .image_info.image_base = BL31_BASE,
88 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
102 .image_info.image_base = ARM_PRELOADED_DTB_BASE,
/rk3399_ARM-atf/plat/imx/imx8m/imx8mp/
H A Dimx8mp_bl2_mem_params_desc.c23 .image_info.image_base = BL31_BASE,
38 .image_info.image_base = BL32_BASE,
52 .image_info.image_base = BL32_BASE,
86 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
/rk3399_ARM-atf/plat/imx/imx8m/imx8mm/
H A Dimx8mm_bl2_mem_params_desc.c23 .image_info.image_base = BL31_BASE,
38 .image_info.image_base = BL32_BASE,
52 .image_info.image_base = BL32_BASE,
86 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
/rk3399_ARM-atf/bl1/tbbr/
H A Dtbbr_img_desc.c17 .image_info.image_base = BL2_BASE,
35 .image_info.image_base = SCP_BL2U_BASE,
46 .image_info.image_base = BL2U_BASE,
/rk3399_ARM-atf/plat/amlogic/gxl/
H A Dgxl_bl31_setup.c107 bl30_image_info.image_base = 0x13c0000; in bl31_early_platform_setup2()
109 bl301_image_info.image_base = 0x13ca000; in bl31_early_platform_setup2()
131 aml_scpi_upload_scp_fw(bl30_image_info.image_base, in gxl_scp_boot()
133 aml_scpi_upload_scp_fw(bl301_image_info.image_base, in gxl_scp_boot()
/rk3399_ARM-atf/plat/socionext/synquacer/
H A Dsq_image_desc.c20 .image_info.image_base = BL31_BASE,
37 .image_info.image_base = BL32_BASE,
54 .image_info.image_base = PLAT_SQ_BL33_BASE,
/rk3399_ARM-atf/plat/imx/imx7/common/
H A Dimx7_bl2_mem_params_desc.c25 .image_info.image_base = IMX7_OPTEE_BASE,
39 .image_info.image_base = IMX7_OPTEE_BASE,
73 .image_info.image_base = IMX7_UBOOT_BASE,
/rk3399_ARM-atf/plat/qti/common/src/
H A Dqti_image_desc.c20 .image_info.image_base = BL31_BASE,
37 .image_info.image_base = BL32_BASE,
54 .image_info.image_base = BL33_BASE,
/rk3399_ARM-atf/plat/st/stm32mp1/
H A Dbl2_plat_setup.c452 bl_mem_params->image_info.image_base = config_info->config_addr; in bl2_plat_handle_post_image_load()
464 pager_mem_params->image_info.image_base = config_info->config_addr; in bl2_plat_handle_post_image_load()
471 paged_mem_params->image_info.image_base = STM32MP_DDR_BASE + in bl2_plat_handle_post_image_load()
493 if ((bl_mem_params->image_info.image_base != 0UL) && in bl2_plat_handle_post_image_load()
494 (optee_header_is_valid(bl_mem_params->image_info.image_base))) { in bl2_plat_handle_post_image_load()
498 bl_mem_params->ep_info.pc = bl_mem_params->image_info.image_base; in bl2_plat_handle_post_image_load()
518 paged_mem_params->image_info.image_base; in bl2_plat_handle_post_image_load()
526 bl_mem_params->ep_info.pc = bl_mem_params->image_info.image_base; in bl2_plat_handle_post_image_load()
556 inv_dcache_range(bl_mem_params->image_info.image_base + in bl2_plat_handle_post_image_load()

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