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/rk3399_ARM-atf/plat/amd/versal2/
H A Dplat_topology.c55 uint8_t clusters = 0, cores = 0; in parse_dt_topology() local
99 if (clusters >= max_clusters) { in parse_dt_topology()
120 out_children_per_cluster[clusters] = cores; in parse_dt_topology()
121 clusters++; in parse_dt_topology()
126 if (clusters == 0) { in parse_dt_topology()
132 for (i = 1; i < clusters; i++) { in parse_dt_topology()
142 *out_clusters = clusters; in parse_dt_topology()
157 uint8_t clusters = PLATFORM_CLUSTER_COUNT; in init_topology_from_dt() local
168 ret = parse_dt_topology(&clusters, &cores_per_cluster, children, PLATFORM_CLUSTER_COUNT); in init_topology_from_dt()
173 if ((clusters * cores_per_cluster) > PLATFORM_CORE_COUNT) { in init_topology_from_dt()
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/rk3399_ARM-atf/fdts/
H A Dfvp-base-gicv2-psci.dts7 /* Configuration: max 4 clusters with up to 4 CPUs */
H A Dfvp-base-gicv3-psci.dts7 /* Configuration: max 4 clusters with up to 4 CPUs */
H A Dfvp-base-gicv3-psci-1t.dts7 /* Configuration: max 4 clusters with up to 4 CPUs with 1 thread per each */
H A Drdaspen.dts27 /* Up to 4 clusters with up to 4 CPU cores in each cluster */
H A Drdaspen-defs.dtsi267 /* Max 4 clusters */
H A Dfvp-defs.dtsi350 /* Max 4 clusters */
/rk3399_ARM-atf/plat/qemu/qemu_sbsa/include/
H A Dsbsa_platform.h33 uint32_t clusters; member
/rk3399_ARM-atf/docs/plat/
H A Dmt8183.rst6 Both clusters can operate at up to 2 GHz.
H A Dnvidia-tegra.rst10 processors are organized as four dual-core clusters, where each cluster has
/rk3399_ARM-atf/plat/qemu/qemu_sbsa/
H A Dsbsa_sip_svc.c92 topology.clusters, topology.cores, in sbsa_sip_smc_handler()
H A Dsbsa_platform.c60 dynamic_platform_info.cpu_topo.clusters = in read_cpu_topology_from_dt()
70 dynamic_platform_info.cpu_topo.clusters, in read_cpu_topology_from_dt()
/rk3399_ARM-atf/docs/perf/
H A Dpsci-performance-n1sdp.rst5 contains an SoC consisting of two dual-core Arm N1 clusters.
H A Dpsci-performance-juno.rst13 x Cortex-A57 clusters running at the following frequencies:
323 last CPUs in their respective clusters to power down, therefore both the L1 and
/rk3399_ARM-atf/docs/plat/arm/automotive_rd/
H A Drdaspen.rst6 * Primary Compute with four processor clusters, each containing:
/rk3399_ARM-atf/docs/
H A Dporting-guide.rst148 clusters in the system.
164 example, the Base AEM FVP implements two clusters with a configurable
2860 CPUs (for example, a cluster), and level 2 is a group of clusters (for
H A Dchange-log.md4755 …- initialize CCI-400 for multiple clusters ([1240dc7](https://review.trustedfirmware.org/plugins/g…
4756 …- power on L2 caches for secondary clusters ([c822d26](https://review.trustedfirmware.org/plugins/…
10268 - Added support for additional CPU clusters