| /rk3399_ARM-atf/common/ |
| H A D | fdt_fixup.c | 201 uint32_t addresses[4]; in fdt_add_reserved_memory() local 236 addresses[idx] = cpu_to_fdt32(HIGH_BITS(base)); in fdt_add_reserved_memory() 239 addresses[idx] = cpu_to_fdt32(base & 0xffffffff); in fdt_add_reserved_memory() 242 addresses[idx] = cpu_to_fdt32(HIGH_BITS(size)); in fdt_add_reserved_memory() 245 addresses[idx] = cpu_to_fdt32(size & 0xffffffff); in fdt_add_reserved_memory() 249 fdt_setprop(dtb, offs, "reg", addresses, idx * sizeof(uint32_t)); in fdt_add_reserved_memory()
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| /rk3399_ARM-atf/docs/plat/arm/arm_fpga/ |
| H A D | index.rst | 13 configuration: the UART and GIC base addresses are read from there. 70 This will use the default load addresses as described above. When those 71 addresses need to differ for a certain setup, they can be passed on the 87 components at their respective load addresses. In addition to this file
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| /rk3399_ARM-atf/tools/marvell/doimage/secure/ |
| H A D | sec_img_8K.cfg | 27 # Two register addresses for each connected CP
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| H A D | sec_img_7K.cfg | 27 # Two register addresses for each connected CP
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| /rk3399_ARM-atf/plat/arm/board/fvp/fdts/ |
| H A D | fvp_fw_config.dts | 10 /* DTB load addresses */
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| /rk3399_ARM-atf/docs/components/ |
| H A D | numa-per-cpu.rst | 82 This linker section also addresses a common performance issue in modern 84 CPUs access different addresses that lie on the same cache line. Although the 88 write to different addresses within the same cache line, the line bounces 179 - derive the base addresses from platform descriptors or firmware configuration
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| H A D | context-management-library.rst | 233 the Secure, Non-Secure and Realm context structure addresses to ensure proper
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| /rk3399_ARM-atf/docs/plat/ |
| H A D | rpi4.rst | 73 memory. The load addresses have a default, but can also be changed by 75 armstub image file, it will put those two load addresses in memory locations
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| H A D | intel-agilex.rst | 57 aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses 0xffe00000 bl2.bin bl2.hex
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| H A D | allwinner.rst | 134 address space. So the virtual addresses used in BL31 match the physical 135 addresses as presented above.
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| H A D | intel-stratix10.rst | 57 aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses 0xffe00000 bl2.bin bl2.hex
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| H A D | rpi5.rst | 60 Kernel and DTB load addresses are also chosen by the VPU and can be changed with
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| H A D | rpi3.rst | 62 between them so that the addresses they are loaded to match the ones specified 89 All addresses are Physical Addresses from the point of view of the Arm cores. 139 different mappings than the Arm cores in which the I/O addresses don't overlap 197 The build system concatenates BL1 and the FIP so that the addresses match the
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| /rk3399_ARM-atf/docs/security_advisories/ |
| H A D | security-advisory-tfv-13.rst | 70 implemented at EL3 and addresses vulnerabilities caused by memory-dependant
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| /rk3399_ARM-atf/plat/allwinner/common/ |
| H A D | arisc_off.S | 81 # same as above, but with the MMIO addresses matching the H6 SoC
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| /rk3399_ARM-atf/plat/nvidia/tegra/scat/ |
| H A D | bl31.scat | 74 * security. GOT is a table of addresses so ensure 8-byte alignment.
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| /rk3399_ARM-atf/docs/tools/ |
| H A D | memory-layout-tool.rst | 148 and limit addresses of each bootloader stage.
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| /rk3399_ARM-atf/docs/plat/qti/ |
| H A D | msm8916.rst | 106 can be changed on the make command line. The default values match the addresses
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| /rk3399_ARM-atf/docs/getting_started/ |
| H A D | build-options.rst | 778 - ``INVERTED_MEMMAP``: memmap tool print by default lower addresses at the 779 bottom, higher addresses at the top. This build flag can be set to '1' to 780 invert this behavior. Lower addresses will be printed at the top and higher 781 addresses at the bottom. 1449 Using ``-O0`` could cause output images to be larger and base addresses
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| /rk3399_ARM-atf/docs/design/ |
| H A D | firmware-design.rst | 1678 correspond to particular addresses. TF-A code can refer to these symbols to 1771 How to choose the right base addresses for each bootloader stage image 1776 locations and the base addresses of each image must be chosen carefully such 1778 the base addresses might need adjustments to cope with the new memory layout. 1781 general recipe for choosing the right base addresses for each bootloader image.
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| /rk3399_ARM-atf/docs/ |
| H A D | porting-guide.rst | 68 only for re-mapping peripheral physical addresses and allows platforms with high 69 I/O addresses to reduce their virtual address space. All other addresses 78 an identity mapping for all addresses. 468 used, choose the smallest value needed to map the required virtual addresses 954 This function returns an array of SMMU addresses and the actual number of SMMUs
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| H A D | change-log.md | 3125 …- add MHUv3 addresses between RSS and AP ([5ab7a2f](https://review.trustedfirmware.org/plugins/git… 3128 …- add MHUv3 register addresses for TC4 ([36ffe3e](https://review.trustedfirmware.org/plugins/gitil… 5199 …- align static device region addresses to reduce MMU table count ([53a868f](https://review.trusted… 5224 …- type cast addresses to fix integer overflow ([bfe82cf](https://review.trustedfirmware.org/plugin… 5247 …- type cast addresses to fix overflow issue ([9129163](https://review.trustedfirmware.org/plugins/… 5649 …- unify TC ROM start addresses ([f9e11c7](https://review.trustedfirmware.org/plugins/gitiles/TF-A/… 6195 …- update device tree with load addresses of TOS_FW config ([1779762](https://review.trustedfirmwar… 6622 …- add MHU addresses for AP-RSS comms on TC2 ([6299c3a](https://review.trustedfirmware.org/plugins/… 7020 …- add function to set MAC addresses ([1aa7e30](https://review.trustedfirmware.org/plugins/gitiles/… 7166 …- correct USART addresses ([de1ab9f](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trust… [all …]
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| /rk3399_ARM-atf/docs/threat_model/firmware_threat_model/ |
| H A D | threat_model.rst | 457 | implemented? | Data received from normal world, such as addresses |
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