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Searched refs:WSTREAMIDEN_REG_CTRL (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Ds10_system_manager.h192 #define WSTREAMIDEN_REG_CTRL BIT(0) macro
203 #define ENABLE_STREAMID WSTREAMIDEN_REG_CTRL | \
205 #define ENABLE_STREAMID_SECURE_TX WSTREAMIDEN_REG_CTRL | \
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_system_manager.h193 #define WSTREAMIDEN_REG_CTRL BIT(0) macro
205 #define ENABLE_STREAMID WSTREAMIDEN_REG_CTRL | \
207 #define ENABLE_STREAMID_SECURE_TX WSTREAMIDEN_REG_CTRL | \
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dn5x_system_manager.h196 #define WSTREAMIDEN_REG_CTRL BIT(0) macro
207 #define ENABLE_STREAMID WSTREAMIDEN_REG_CTRL | \
209 #define ENABLE_STREAMID_SECURE_TX WSTREAMIDEN_REG_CTRL | \
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_system_manager.h227 #define WSTREAMIDEN_REG_CTRL BIT(0) macro
240 #define ENABLE_STREAMID WSTREAMIDEN_REG_CTRL \
242 #define ENABLE_STREAMID_SECURE_TX WSTREAMIDEN_REG_CTRL \