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Searched refs:SSC_REG_BASE (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/arm/board/juno/
H A Djuno_security.c136 mmio_write_32(SSC_REG_BASE + SSC_DBGCFG_SET, in init_debug_cfg()
140 mmio_write_32(SSC_REG_BASE + SSC_DBGCFG_CLR, in init_debug_cfg()
144 mmio_write_32(SSC_REG_BASE + SSC_DBGCFG_SET, in init_debug_cfg()
148 mmio_write_32(SSC_REG_BASE + SSC_DBGCFG_CLR, in init_debug_cfg()
/rk3399_ARM-atf/include/plat/arm/css/common/
H A Dcss_def.h25 #define SSC_REG_BASE 0x2a420000 macro
26 #define SSC_GPRETN (SSC_REG_BASE + 0x030)
/rk3399_ARM-atf/plat/arm/board/morello/include/
H A Dplatform_def.h254 #define SSC_VERSION (SSC_REG_BASE + SSC_VERSION_OFFSET)
/rk3399_ARM-atf/plat/arm/board/n1sdp/include/
H A Dplatform_def.h279 #define SSC_VERSION (SSC_REG_BASE + SSC_VERSION_OFFSET)