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Searched refs:SOCFPGA_CCU_NOC_REG_BASE (Results 1 – 7 of 7) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/common/drivers/ccu/
H A Dncore_ccu.h24 #define addr_CAIUIDR1 SOCFPGA_CCU_NOC_REG_BASE + 0x00000
25 #define addr_GRBUNRRUCR SOCFPGA_CCU_NOC_REG_BASE + 0xFFFF8
26 #define base_addr_NRS_CAIU0 SOCFPGA_CCU_NOC_REG_BASE + 0x00000
27 #define base_addr_NRS_NCAIU0 SOCFPGA_CCU_NOC_REG_BASE + 0x01000
28 #define base_addr_NRS_NCAIU1 SOCFPGA_CCU_NOC_REG_BASE + 0x02000
29 #define base_addr_NRS_NCAIU2 SOCFPGA_CCU_NOC_REG_BASE + 0x03000
30 #define base_addr_NRS_NCAIU3 SOCFPGA_CCU_NOC_REG_BASE + 0x04000
31 #define base_addr_NRS_DCE0 SOCFPGA_CCU_NOC_REG_BASE + 0x05000
32 #define base_addr_NRS_DCE1 SOCFPGA_CCU_NOC_REG_BASE + 0x06000
37 #define ALT_CCU_CCU_DMI0_DMIUSMCTCR_ADDR SOCFPGA_CCU_NOC_REG_BASE + 0x7300
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H A Dncore_ccu.c22 #define CCU_DMI0_DMIUSMCMCR SOCFPGA_CCU_NOC_REG_BASE + 0x7340
23 #define CCU_DMI0_DMIUSMCMAR SOCFPGA_CCU_NOC_REG_BASE + 0x7344
/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Dsocfpga_plat_def.h41 #define SOCFPGA_CCU_NOC_REG_BASE 0xf7000000 macro
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dsocfpga_plat_def.h42 #define SOCFPGA_CCU_NOC_REG_BASE U(0xf7000000) macro
/rk3399_ARM-atf/plat/intel/soc/common/include/
H A Dsocfpga_noc.h18 #define SOCFPGA_CCU_NOC(_ctrl, _dev) (SOCFPGA_CCU_NOC_REG_BASE \
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dsocfpga_plat_def.h57 #define SOCFPGA_CCU_NOC_REG_BASE 0xf7000000 macro
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dsocfpga_plat_def.h72 #define SOCFPGA_CCU_NOC_REG_BASE 0x1c000000 macro