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Searched refs:PSTATE (Results 1 – 7 of 7) sorted by relevance

/rk3399_ARM-atf/drivers/imx/usdhc/
H A Dimx_usdhc.c132 ret = mmio_read_32_poll_timeout(reg_base + PSTATE, pstate, in imx_usdhc_set_clk()
283 err = mmio_read_32_poll_timeout(reg_base + PSTATE, pstate, in imx_usdhc_send_cmd()
291 err = mmio_read_32_poll_timeout(reg_base + PSTATE, pstate, in imx_usdhc_send_cmd()
H A Dimx_usdhc.h45 #define PSTATE 0x024U macro
/rk3399_ARM-atf/docs/design/
H A Dinterrupt-framework-design.rst214 #. Interrupt exceptions (``PSTATE.I`` and ``F`` bits) are masked during execution
453 masks all interrupts (``PSTATE.DAIF`` bits) when it calls
530 #. **CSS=0, TEL3=0**. If ``PSTATE.F=0``, Secure-EL1 interrupts will be
534 If ``PSTATE.F=1`` then Secure-EL1 interrupts will be handled as per the
538 know the state of the system, general purpose and the ``PSTATE`` registers
548 is in secure state. They will not be visible to the SP. The ``PSTATE.F`` bit
557 #. **CSS=0, TEL3=0**. If ``PSTATE.I=0``, non-secure interrupts will be
567 If ``PSTATE.I=1`` then the non-secure interrupt will pend until execution
571 be visible to the SP. The ``PSTATE.I`` bit in Secure-EL1/Secure-EL0 will
626 ``PSTATE.I`` and ``PSTATE.F`` bits set.
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H A Dfirmware-design.rst594 PSTATE.EL = 3
595 PSTATE.RW = 1
596 PSTATE.DAIF = 0xf
717 PSTATE.EL = 3
718 PSTATE.RW = 1
719 PSTATE.DAIF = 0xf
747 PSTATE.AIF = 0x7
809 PSTATE.AIF = 0x7
1202 which gets triggered in EL3 when PSTATE.A is unmasked. Its only applicable when lower
1213 current EL) any time after PSTATE.A is unmasked. This is wrong because the error originated
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/rk3399_ARM-atf/docs/components/
H A Dcontext-management-library.rst561 This includes ( MDCR_EL3.SDD, SCR_EL3.{EA, SIF}, PMCR_EL0.DP, PSTATE.DIT)
H A Dsecure-partition-manager-mm.rst450 3. ``PSTATE``
/rk3399_ARM-atf/docs/getting_started/
H A Dbuild-options.rst334 Timing) extension. It allows setting the ``DIT`` bit of PSTATE in EL3.
419 Access Never) extension. ``FEAT_PAN`` adds a bit to PSTATE, generating a
1296 - ``ERRATA_SME_POWER_DOWN``: Boolean option to disable SME (PSTATE.{ZA,SM}=0)