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4f51d8f7 |
| 06-Jun-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "nxp-mmc/fixes" into integration
* changes: feat(nxp-mmc): add dynamic mapping fix(nxp-mmc): wait SDSTB before changing the clock fix(nxp-mmc): fix the clock rate calc
Merge changes from topic "nxp-mmc/fixes" into integration
* changes: feat(nxp-mmc): add dynamic mapping fix(nxp-mmc): wait SDSTB before changing the clock fix(nxp-mmc): fix the clock rate calculation fix(nxp-mmc): remove unnecessary delay feat(nxp-mmc): flush and invalidate buffers feat(nxp-mmc): add data buffer refactor(nxp-mmc): check multi block transfer refactor(nxp-mmc): set MIXCTRL_DTDSEL refactor(nxp-mmc): populate command transfer type fix(nxp-mmc): fix clk_rate and bus_width type fix(nxp-mmc): correct the usage of BIT and GENMASK docs(changelog): add subsection for uSDHC
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| #
583a544c |
| 28-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): wait SDSTB before changing the clock
According to the reference manual, the host driver must ensure that the SDSTB field is high before changing the clock divisor value (SDCLKFS or DVS
fix(nxp-mmc): wait SDSTB before changing the clock
According to the reference manual, the host driver must ensure that the SDSTB field is high before changing the clock divisor value (SDCLKFS or DVS).
Change-Id: I3c89df707a825ccb5e5125b52e2d321b659bbb3f Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
b61379fb |
| 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(nxp-mmc): add data buffer
The prepare callback is used to set buffer details for a transfer. The actual transfer may not occur immediately. Therefore, the details are saved and applied to the n
feat(nxp-mmc): add data buffer
The prepare callback is used to set buffer details for a transfer. The actual transfer may not occur immediately. Therefore, the details are saved and applied to the next data transfer command. This mechanism also helps distinguish between single and multi-block transfers based on the transfer size.
Change-Id: I7bcfde0521ad628e5950dfc71482191ac35433d1 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
a59d43fc |
| 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
refactor(nxp-mmc): populate command transfer type
The CMD_XFR_TYP register description in the reference manual includes a table where the response type, index check, and CRC check are populated base
refactor(nxp-mmc): populate command transfer type
The CMD_XFR_TYP register description in the reference manual includes a table where the response type, index check, and CRC check are populated based on the CMD's response type. Therefore, replace the CMD_XFR_TYP set based on the command ID with the mechanism mentioned in the reference manual.
Change-Id: Ibe6e04d1682e258ae2377dd7a1d0abb6c7b3f164 Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
3d165079 |
| 04-Apr-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): fix clk_rate and bus_width type
Both 'clk_rate' and bus_width members of the 'struct imx_usdhc_params' are defined as integers, while their usages are unsigned int. Therefore, change t
fix(nxp-mmc): fix clk_rate and bus_width type
Both 'clk_rate' and bus_width members of the 'struct imx_usdhc_params' are defined as integers, while their usages are unsigned int. Therefore, change the type to unsigned int. This also helps to avoid MISRA C-2012 Rule 10.3 violations when unsigned values are assigned to signed variables.
Change-Id: If52e15a164732b68286f5303c4acbeb4ff993081 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
26fd0688 |
| 04-Apr-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): correct the usage of BIT and GENMASK
The uSDHC register definitions use BIT and GENMASK macros, which are implicitly expanded to their 64-bit versions. This is incorrect from a hardwar
fix(nxp-mmc): correct the usage of BIT and GENMASK
The uSDHC register definitions use BIT and GENMASK macros, which are implicitly expanded to their 64-bit versions. This is incorrect from a hardware perspective, as the registers are 32-bit wide. Therefore, BIT_32 and GENMASK_32 macros are used instead. Similarly, the register offset must use an unsigned int offset instead of signed numbers.
Change-Id: I3a3379ba9fa538226f958b68aac702752ea9a62a Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
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09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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9d068f66 |
| 08-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1673 from antonio-nino-diaz-arm/an/headers
Standardise header guards across codebase
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c3cf06f1 |
| 08-Nov-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this proje
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver - dt-bindings folders - zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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36044baf |
| 05-Sep-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1515 from bryanodonoghue/atf-master+linaro-warp7-squash-v4
Atf master+linaro warp7 squash v4
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8b659130 |
| 28-Jun-2018 |
Jun Nie <jun.nie@linaro.org> |
drivers: imx: mxc_usdhc: Add USDHC driver to support boot EMMC
Add USDHC driver to support boot EMMC. Only initialization and single/multiple block read are tested.
[bod: fixed checkpatch.pl compla
drivers: imx: mxc_usdhc: Add USDHC driver to support boot EMMC
Add USDHC driver to support boot EMMC. Only initialization and single/multiple block read are tested.
[bod: fixed checkpatch.pl complaints] [bod: changed name to imx_usdhc for namespace consistency] [bod: squashed antecedent fixes into this one patch]
Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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