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Searched refs:PCM_WDT_LATCH_SPARE_1 (Results 1 – 12 of 12) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_internal.c394 wakesta->tr.comm.debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
435 wakesta->debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
H A Dmt_spm_reg.h491 #define PCM_WDT_LATCH_SPARE_1 (SPM_BASE + 0x850) macro
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_internal.c432 wakesta->tr.comm.debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
473 wakesta->debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
H A Dmt_spm_reg.h476 #define PCM_WDT_LATCH_SPARE_1 (SPM_BASE + 0x850) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_internal.c467 wakesta->tr.comm.debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
507 wakesta->debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
H A Dmt_spm_reg.h421 #define PCM_WDT_LATCH_SPARE_1 (SPM_BASE + 0x850) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_internal.c350 wakesta->tr.comm.debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
/rk3399_ARM-atf/plat/mediatek/mt8188/include/
H A Dspm_reg.h426 #define PCM_WDT_LATCH_SPARE_1 (SPM_BASE + 0x850) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_internal.c701 wakesta->tr.comm.debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
H A Dmt_spm_reg.h404 #define PCM_WDT_LATCH_SPARE_1 (SPM_BASE + 0x984) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_internal.c726 wakesta->tr.comm.debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
H A Dmt_spm_reg.h678 #define PCM_WDT_LATCH_SPARE_1 (SPM_BASE + 0x95A0) macro