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/rk3399_ARM-atf/lib/zlib/
H A Dcrc32.c55 # define N Z_TESTN macro
57 # define N 5 macro
59 #if N < 1 || N > 6
60 # error N must be in 1..6
333 braid(crc_braid_table, crc_braid_big_table, N, W); in make_crc_table()
709 if (len >= N * W + W - 1) { in crc32_z()
722 blks = len / (N * W); in crc32_z()
723 len -= blks * N * W; in crc32_z()
736 #if N > 1 in crc32_z()
739 #if N > 2 in crc32_z()
[all …]
H A Dcrc32.h209 #if N == 1
1747 #if N == 2
3285 #if N == 3
4823 #if N == 4
6361 #if N == 5
7899 #if N == 6
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/include/
H A Ds32cc-ncore.h23 #define NCORE_DIRU(N) (NCORE_BASE_ADDR + UL(0x80000) + ((N) * UL(0x1000))) argument
26 #define NCORE_DIRUSFE(N) (NCORE_DIRU(N) + UL(0x10)) argument
30 #define NCORE_DIRUCASE(N) (NCORE_DIRU(N) + UL(0x40)) argument
34 #define NCORE_DIRUSFMC(N) (NCORE_DIRU(N) + UL(0x80)) argument
39 #define NCORE_DIRUSFMA(N) (NCORE_DIRU(N) + UL(0x84)) argument
48 #define NCORE_CAIU(N) (NCORE_BASE_ADDR + ((N) * UL(0x1000))) argument
56 #define NCORE_CAIUTC(N) (NCORE_CAIU(N) + NCORE_CAIUTC_OFF) argument
/rk3399_ARM-atf/lib/compiler-rt/builtins/
H A Dint_div_impl.inc17 const unsigned N = sizeof(fixuint_t) * CHAR_BIT;
19 unsigned sr = (d ? clz(d) : N) - (n ? clz(n) : N);
20 // 0 <= sr <= N - 1 or sr is very large.
21 if (sr > N - 1) // n < d
23 if (sr == N - 1) // d == 1
26 // 1 <= sr <= N - 1. Shifts do not trigger UB.
28 n <<= N - sr;
31 r = (r << 1) | (n >> (N - 1));
36 const fixint_t s = (fixint_t)(d - r - 1) >> (N - 1);
46 const unsigned N = sizeof(fixuint_t) * CHAR_BIT;
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H A Dint_util.h44 #define REPEAT_N_TIMES_(N, code_to_repeat) REPEAT_##N##_TIMES(code_to_repeat) argument
45 #define REPEAT_N_TIMES(N, code_to_repeat) REPEAT_N_TIMES_(N, code_to_repeat) argument
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_hwreq.h158 #define REG_PERI_REQ_EN(N) (PERICFG_AO_BASE + 0x070 + 0x4 * (N)) argument
159 #define REG_PERI_REQ_STA(N) (PERICFG_AO_BASE + 0x0A0 + 0x4 * (N)) argument
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_hwreq.h205 #define REG_PERI_REQ_EN(N) (PERICFG_AO_BASE + 0x050 + 0x4 * N) argument
206 #define REG_PERI_REQ_STA(N) (PERICFG_AO_BASE + 0x06C + 0x4 * N) argument
/rk3399_ARM-atf/drivers/nxp/clk/s32cc/include/
H A Ds32cc-clk-regs.h64 #define PLLDIG_PLLODIV(PLL, N) ((PLL) + 0x80UL + ((N) * 0x4UL)) argument
119 #define DFS_PORTOLSR_LOL(N) (BIT_32(N) & GENMASK_32(5U, 0U)) argument
/rk3399_ARM-atf/docs/process/
H A Dmisra-compliance.csv2 1,D,1.1,MISRA C 2012,Required,N/A,Yes,
3 2,D,2.1,MISRA C 2012,Required,N/A,Yes,
4 3,D,3.1,MISRA C 2012,Required,N/A,No,It can’t be done retroactively.
5 4,D,4.1,MISRA C 2012,Required,N/A,Yes,
6 5,D,4.2,MISRA C 2012,Advisory,N/A,Yes,
21 20,R,1.3,MISRA C 2012,Required,N/A,Yes,
/rk3399_ARM-atf/fdts/
H A Dstm32mp13-ddr3-1x4Gb-1066-binF.dtsi17 * Tc > + 85C : N
H A Djuno-ethosn.dtsi10 * Refer to the Arm(R) Ethos(TM)-N driver stack for complete device tree examples.
H A Dstm32mp151a-prtt1a.dts213 * PRTT1C also. All involved pins are N.C. on PRTT1A/S for that
/rk3399_ARM-atf/docs/threat_model/firmware_threat_model/
H A Dthreat_model.rst333 | Impact | N/A | Low (2) | Low (2) |
335 | Likelihood | N/A | High (4) | High (4) |
337 | Total Risk Rating | N/A | Medium (8) | Medium (8) |
396 | Impact | N/A | High (4) | High (4) |
398 | Likelihood | N/A | Critical (5) | Critical (5) |
400 | Total Risk Rating | N/A | Critical (20) | Critical (20) |
819 | Impact | N/A | Critical (5) | Critical (5) |
821 | Likelihood | N/A | Medium (3) | Medium (3) |
823 | Total Risk Rating | N/A | High (15) | High (15) |
871 | Impact | N/A | Critical (5) | Critical (5) |
[all …]
/rk3399_ARM-atf/docs/plat/arm/
H A Darm-build-options.rst13 - ``ARM_CONFIG_CNTACR``: boolean option to unlock access to the ``CNTBase<N>``
14 frame registers by setting the ``CNTCTLBase.CNTACR<N>`` register bits. The
15 frame number ``<N>`` is defined by ``PLAT_ARM_NSTIMER_FRAME_ID``, which
/rk3399_ARM-atf/docs/plat/
H A Drcar-gen3.rst25 | R-Car M3-N | - Salvator-X | |
/rk3399_ARM-atf/docs/components/
H A Dnuma-per-cpu.rst72 remote nodes (Node 1 through Node N) each contain their own local
H A Dfirmware-update.rst463 N/A
H A Drmm-el3-comms-spec.rst1322 | | | | StreamID = RequesterID[N-1:0] + (1<<N)*Constant_B |
/rk3399_ARM-atf/docs/getting_started/
H A Dbuild-options.rst133 | 0 | none | N | N |
137 | 2 | pac-ret | Y | N |
139 | 3 | pac-ret+leaf | Y | N |
141 | 4 | bti | N | Y |
670 configure an Arm® Ethos™-N NPU. To use this service the target platform's
676 Arm® Ethos™-N NPU. Requires ``ETHOSN_NPU_DRIVER`` and
/rk3399_ARM-atf/docs/about/
H A Dmaintainers.rst205 Arm® Ethos™-N NPU driver
/rk3399_ARM-atf/docs/
H A Dporting-guide.rst577 If the platform port uses the Arm® Ethos™-N NPU driver, the following
584 If the platform port uses the Arm® Ethos™-N NPU driver with TZMP1 support
H A Dchange-log.md4954 - **Ethos-N**
5532 - **Ethos-N**
5989 - **Ethos-N**
6444 - **Ethos-N**
6532 - **Ethos-N**
6933 - **Ethos-N**
8662 - **Ethos-N**
9012 - **Ethos-N**
9803 - Added SiP service to configure Ethos-N NPU
/rk3399_ARM-atf/docs/design/
H A Dfirmware-design.rst2388 Consider a system of 2 CPUs with 'N' bakery locks as shown above. For an