Home
last modified time | relevance | path

Searched refs:L2_RESET_DONE_REG (Results 1 – 7 of 7) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/common/aarch64/
H A Dplat_helpers.S105 ldr x4, =L2_RESET_DONE_REG
147 ldr x4, =L2_RESET_DONE_REG
203 ldr x4, =L2_RESET_DONE_REG
/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Dsocfpga_plat_def.h127 #define L2_RESET_DONE_REG SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_6) macro
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dsocfpga_plat_def.h128 #define L2_RESET_DONE_REG SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_6) macro
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dsocfpga_plat_def.h153 #define L2_RESET_DONE_REG SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_6) macro
/rk3399_ARM-atf/plat/intel/soc/common/
H A Dsocfpga_psci.c236 mmio_clrsetbits_32(L2_RESET_DONE_REG, BS_REG_MAGIC_KEYS_MASK, in socfpga_system_reset2()
246 mmio_write_32(L2_RESET_DONE_REG, L2_RESET_DONE_STATUS); in socfpga_system_reset2()
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dsocfpga_plat_def.h182 #define L2_RESET_DONE_REG SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_3) macro
/rk3399_ARM-atf/plat/intel/soc/agilex5/
H A Dbl31_plat_setup.c264 mmio_clrsetbits_32(L2_RESET_DONE_REG, BS_REG_MAGIC_KEYS_MASK, in bl31_plat_set_secondary_cpu_entrypoint()